Hello I have a question regarding connection of TPSM63606 pin 5 (VLDOIN) in a circuit. Our application has the device configured with Vin = 7.5V, Vout =1.0V providing approx 3A of load current. Rt = 14.3K = 906Khz.
We have encountered confusion about what to do with the VLDOIN pin: tie directly to ground or connect 0.1 to 1uF capacitor?
Currently we have it tied to GND. Simulation and bench testing show satisfactory operation. However closer review of the datasheet has caused some confusion.
Table 6-1 of datasheet describes the pin as: Input bias voltage. Input to the internal LDO that supplies the internal control circuits. Connect to an output voltage point to improve efficiency. Connect an optional high-quality 0.1-μF to 1-μF capacitor from this pin to ground for improved noise immunity. If the output voltage is above 12 V, connect this pin to ground.
Section 8.3-11 of the datasheet provides additional insight about VLDOIN. Here are pertinent snippets from that section:
If the VLDOIN voltage is less than 3.1 V, VIN1 and VIN2 directly power the internal LDO.....
The LDO provides the VCC voltage from one of two inputs: VIN or VLDOIN. When VLDOIN is tied to ground or below 3.1 V, the LDO derives power from VIN. The LDO input becomes VLDOIN when VLDOIN is tied to a voltage above 3.1 V. The VLDOIN voltage must not exceed both VIN and 12 V.
Also in that section graphs 8-5 and 8-6 show Efficiency Increases with External Bias. The red plots in each are described as "VLDOIN = GND"
Our design is not constrained by efficiency and so we don't need to config the circuit for that metric.
So our specific questions are:
1) Is our connection of VLDO to GND valid for our configuration?
2) Are there any negative performance aspects we are unaware of?
Thanks for your review and consideration,
Mark
