UCC256403: UCC256403 550W Battery Charger Design Issue

Hi,

We can start debugging from CV mode. 

Can you please desolder D11 and short CV mode feedback as shown below?

And now give Vin at J1 and ground at J3 and check output voltage is stable or not?

Give scope pics of LO, HS, Resonant current and Vout.

Regards,

Sougata

Dear Mr. Sougata Nayak,

As you advised, I have performed the test in CV mode only, but the issue still remains.
Let me first describe the test setup:

- VIN: 380 VDC input

- VCC (P2): 15 V external supply

- P1: 12 V external supply

When power is applied, VOUT slowly rises for about 20 seconds. In the range of 30–38 V, the output voltage fluctuates.
When a load is applied to VOUT, the output immediately drops to 0 V.

The switching frequency of Q1 and Q2 is measured to be around 1 Hz.
Attached are the VGS waveforms of Q1 and Q2 for your reference.

I suspect the following possible causes:

1. BW pin configuration: The BW pin is currently connected directly to ground for testing. Could this cause abnormal operation?

2. Transformer design: The transformer was built using a PQ4040 core, with 24 turns on the primary and 6 turns on each secondary winding.
The design focused on achieving the correct turns ratio and primary inductance, but are there any additional transformer considerations specific to the LLC topology that I might have overlooked?

Best regards,

Hi,

This is, for sure going to 1sec fault. Can you please probe ISNS pin with 10us/div result to check if it is OCP fault or not?

BW pin please dont connect it to ground. 

For other things, I will get back to you shortly. 

Dear Sougata Nayak,

As per your request, I measured the ISNS pin voltage when the output voltage reached approximately 30 V.
My differential probe has an attenuation ratio of 50:1.

For the capacitor C10, I am using the C717U221KZYDAAWL25 component.

I understand that the voltage on the ISNS pin should remain below 7 V, but I am observing a higher voltage and am unsure why this is happening.

Additionally, could you please confirm what voltage rating is appropriate for the VCR and ISNS capacitors?
Currently, I have selected components rated at 1 kV.

For your reference, I have attached the schematic of the circuit currently under test.
During this test:

The CC (constant current) function is disabled,

The bias winding supply is not being used, and

The Precharge Mode circuit is also disabled.

Thank you very much for your support and guidance.

UCC256403_LLC.pdf

Best regards,

Additionally, I have attached the waveform of the HS pin for your reference.

Hi,

There is something wrong in ISNS waveform. It should be sinusoidal one, just similar to resosnant current. 

Can you please check resonant current and ISNS waveform together?

Regards,

Sougata

The measured voltage on the ISNS and VCR pins is close to 500 V.

Hi,

can you please recheck? ISNS and VCR voltage can not go that much...

Regards,

Sougata

Hello,
After checking again, I still see peak voltages of several hundred volts.
When I tested it in LTspice at 1 Hz, I confirmed that the output follows the input voltage closely.

Initially, I suspected that the issue was caused by an incorrect selection of the VCR and ISNS capacitors.
However, even after replacing them, the same problem persists.

My second suspicion is that the gate driver of the UCC256403 chip may not be strong enough for the MOSFETs I’m using.

Can you confirm if the gate driver current capability of the UCC256403 chip is 0.6 A?

Hi, 

Yes, the gate driver current source capability of the UCC256403 chip is 0.6 A.

VCR can't go beyond 7V and ISNS is clamped to some voltage. Please probe in correct way. 

Regards,

Sougata

I measured the PGND, VCR, and ISNS using a high-voltage differential probe.

Hello,

I disassembled the Q1 and Q2 MOSFETs (AOB20A60L) from the UCC25640EVM-020 evaluation board and transplanted them onto my own LLC board. With these MOSFETs, I successfully achieved a 58 V output at no-load condition.

When I measured the HS pin, I confirmed that the converter was operating in burst mode at around 80 kHz.

However, as soon as I applied a load, both MOSFETs shorted and failed. I have already ordered replacement MOSFETs, but I would like to ask a few questions:

At no-load condition, the output voltage (Vout) swings between 51 V and 58 V. I assume that increasing the output capacitor could stabilize the voltage. Is this assumption correct?

According to the UCC25640x design tool, the expected MOSFET VqLLC is approximately 615 V. Based on this, I selected MOSFETs rated at 650 V. Was this an appropriate choice? I noticed that the MOSFETs on the demo board (AOB20A60L) are rated at 700 V Vds.

Thank you very much for your support and guidance.

Best regards,

Hi, 

Thanks for your patience. I will surely come back to you on Monday.

Regards,

Sougata

Hi,

Increasing the cap may work, But you may need to change the compensation ckt to further stabilize it. 

Also, Do you have these FETs: IPB60R105CFD7?

If yes, please check with these FETs. 

And If FETs are still failing, please share the picture of LO, HO, resonant current, HG, LG in oscilloscope to understand more. 

650V MOSFET should be fine. but the turn on and turn off delay and reverse recovery charge associated with the body diode of FETs matter.  Both of them should be as low as possible.

Regards,

Sougata

Hello,

I purchased new IPW60R099CM8XKSA1 MOSFETs and performed several tests.
However, In all four tests the MOSFETs failed by shorting out.

I changed the VGS resistors to 10 kΩ and 51 kΩ for testing, but the MOSFETs still shorted.
In some cases, the output reached around 52–60 V, but when I turned the main input power off and on again, the MOSFET suddenly shorted immediately.

Since I only have a limited number of samples, I would like to verify whether my design is correct.
I am running out of development time, so the schedule is very tight.

Thank you.

Attached is the current circuit.

2844.UCC256403_LLC.pdf

Hi,

Design wise it looks ok.

Can you please share LO, HO, resonant current, HG, LG in oscilloscope to understand more? 

You can give no load pics and 0.5A loads?

Regards,

Sougata

Unfortunately for me, when I try to measure, the FET burns.

In my calculation, Isec peak at OCP1 level is 70.59A, is that ok?

Hi,

Without scope pics, it is difficult to debug what is happening with FETs and gate driver circuit.

Yes, OCP level is okay

Regards,

Sougata

Where should I measure the volunteer current?

Hi,

You can measure in following point:

However, always check LG is going though some overshoot or not when HG is going up.

Regards,

Sougata

Hello,

I am sending you the measurements of the MOSFET LO gate signal and the HS current, as you requested.
During testing, the first time I applied the main input power, the output was around 55 V.
However, after turning the main power off and then applying it again, the MOSFET was immediately damaged.

The attached data was measured during the second power-up attempt.
Channel 1 is the LO gate signal, and Channel 2 is the current probe (100 mV/A).
I only have one differential probe available, so I was only able to measure the LO gate.
Thank you for your understanding.

Thank you.

LLC Measurement Data_251118.pdf

Hi, 

Understood.

Can you please change the gate driver with below ckt:

Use PNP transistor with 1 ohm resistor for turning the FETs off. 

Use the same circuit in high side gate drive also. 

Regards,

Sougata

Hello.

What is the difference between the circuit you mentioned and the existing PMP40766 circuit?

Is the PMP40766 circuit impossible?

Hi, it is not impossible, 

It depends upon the layout and the FET reverse recovery diode. 

By the above circuit, we will try to pull down the gate strongly when LO or HO is off. 

Regards,

Sougata

Hello.

Is the circuit you mentioned applied to PMP22083?

How can we calculate the selection of 90R and 50R?

Hello.

I would like to test using 2N3906.

Is there a problem with using it?

Hello,

I conducted a test by adding the PNP BJT circuit you provided.

After applying a 380VDC input, the output remained at approximately 6–8V for a few seconds before rising to 33–35V.
Channel 1 is ISNS measurement.

Thank you.
LLC Measurement Data_251119.pdf

Understood. 

This is 1sec fault. 

Do the next test cases:

a. Change 90 ohm to 10 ohm resistor in gate driver, 40 ohm to 0 ohm. 

b. check ISNS waveform peak value when ever switches are switching. I feel this 1sec fault is OCP fault. 

Regards,

Sougata

Hello.

I measured by modifying the resistance as you said.

Unlike the previous one, the output voltage was at the level of 16V.

When I measured ISNS, there was a section where the ISNS voltage exceeded -50V or -100V.

Is the ISNS capacitor value miscalculated?

LLC Measurement Data_251119_2.pdf

Hi,

In design calculator, you have put Cisns of 180pF. Can you please put that?

Regards,

Sougata

Hello,

When I first designed the circuit, I selected Cisns as 200 pF and Risns as 70 Ω.

However, after recalculating, the components currently mounted on the board are 68 pF and 200 Ω.

Additionally, this is the current LL/SS setting.

I tested the FETs using the UCC25640EVB board.

However, I found that the circuit was operating abnormally.
When I measured the low-side FET gate, I observed that the gate voltage was rising up to 100V.

Is it possible that I selected the wrong FET?

I used the IPW60R099CM8.

Hi,

This may be due to hard switching of FETs. You may check resonant current at that point along with Switch node. 

Regards,

Sougata

Hello.

Is it possible to answer the LLC Measurement Data_251119_2.pdf question?

I'm analyzing the cause but I can't find it.

Regards,