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LM20136 / gmps, gmea

Other Parts Discussed in Thread: LM20136

Hi,

Our customer plans to use LM20136 with inverting configuration. Then they need to know the gmps and gmea for it. Could you please disclose the information?

They are referring following application note to design inverting configuration.

http://www.ti.com/lit/an/slva317a/slva317a.pdf

Best Regards,

  • Hi Satoshi,

    The gmea is 510 μmho.  The gmps is not defined in the datasheet because the power stage transfer function is dynamic.  This is unique to this product as it incorprates a non-linear slope compensation technique to optimize the transient response.  If it is a matter of setting the poles and zeros, the equations given in the datasheet should suffice.

    Regards,

    Dan

  • Hello Satoshi,

    Daniel is right about the GMPS. But, we have been working on creating inverting applications ourselves for Webench purposes. If you provide us with your design conditions, we might be able to help you a little more. 

    Regards,
    Akshay Mehta 

  • Hi Dan-san,

    Thank you for your information for gmea and explanation for gmps. These information will be helpful for customer.

    Hi Akshay Mehta-san,

    It will be very nice to provide some simulation data for inverting application by using Webench. I have customer's requirement for Vin, Vout and Iout, and also the input and output capacitors they plan to use. Can you try to simulate with these information? Can I have your recommendation like schematic as pdf report such as created by Webench?

    Best Regards

    Satoshi Sonoki 

    LM20136 inverting.pdf
  • Hello Satoshi-san,

    Unfortunately we do not have a spice model for the LM20136 ready yet. My colleague is working on that and he is copied on these messages. In the meanwhile, I have tried to put together something to get you started.

    I have attached an excel file that has some basic calculations for the power stage and the compensation for the buck-boost application using LM20136. I have also created a schematic and attached a PDF copy to this message. These component values are calculated using some information I had regarding this part. They have not been tested in the lab because I do not have a PCB for the inverting application. I would strongly suggest that this design should be bench tested. Here are some remarks.

    1) The two output caps that you suggested are 100uF each. When I checked the specs on the Murata cap, I saw that it would derate to about 65uF under applied output voltage. Assuming the Taiyo Yuden cap would derate similarly, I have used a total of 135uF for the compensation calculation

    2) The schematic you attached was very difficult to read. I am assuming that the SYNC feature is not used for this design. The default frequency in case SYNC pin is grounded is 410KHz. I have used that for my calculations.

    3) The inductor is calculated for a 30% ripple current and is rated for 6A.

    4) In out past experience with buck boost topology, the high frequency bypass cap between input and output is very important. The value is somewhat dependent on the layout. I have put a place holder of a 1uF cap. I am also attaching a presentation done by my colleagues on EMI mitigation and good layouts practices. I hope this helps.

    Regards,
    Akshay
    Applications Engineer
    Simple Switchers, TI-SVA 

    8838.LM20136_inv.xls

    5773.LM20136_inverting.pdf

    8168.Switching Power Supply Design_ EMI.ppt