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About SCLK of TLC5941, and the check of Dot Correction.

Guru 19575 points
Other Parts Discussed in Thread: TLC5941, TLC5940

Please let me know two points below about how to use TLC5941.

- Although I think that the data of SCLK updates SID data by the 193rd bit, when this bit does not exist, what happens?
 
For example)
193 bits is not, and will 1 bit of SCLK of the next GS data transmission be equivalent to 193 bits, and will shift 1 bit?

Or

Is excessive data of 193 bits or more disregarded?
In that case, which shall be disregarded between the first (1 bit~) data and the last (193 bits or more)?

- Is there any method of checking whether Dot Correction data is set correctly?
If there is a method, please let me know.

Thank you for your consideration.

 

 

  •  Hello Satoshi,

     193'rd SCLK is used for LOD data loading to 192bit shift register not for data shifting in the shift register.

    So the 193'rd bit is needed for correct data shifting and writing.

     Also dot correction data can be loaded into bit number 24-119 of the shift resistore at same timing as SID data loading

    like figure 19 on page 18 of TLC5940 datasheet.

     Best regards,

     Kazuya Nakai.

     

     

     

     

  •  Hello Satoshi,

     I'm sorry your question was for TLC5941.

     In case of TLC5941, Fig19 is descrived on page 20.

     Best regards,

     Kazuya Nakai

     

  • Dear Kazuya-san

    Thank you for your reply.

    Please let me know to a slight degree about SID data.

    1.
    Three-piece cascade connection of TLC5941 is carried out.
    what kind of output is SOUT of every TLC5941?

    For example)
    MCU ->TLC5941①->TLC5941②->TLC5941③


    When it connects as mentioned above, what does SOUT of ①, ②, and ③ become, respectively?
    Although the output of SOUT has all come out by 193x3 clocks, which SOUT is outputting SID of each TLC5941?
    (Can all the SID(s) be checked by SOUT of any one TLC5941?)

    2.
    What does SOUT at the time (MODE=High) of DC data transmission become?
    Although SOUT for 96x3 clocks is outputted, does this also have composition of SID data?
    Or is SOUT of another composition completely outputted at the time of DC data transmission?
    Then, please let me know what kind of SOUT output it becomes.

    Best regards,

    Satoshi

  •  Hello Satoshi,

     193rd SCLK is used for SID loading to the 192bit shift register. The data in the shift register is not shifted at the moment.

     The data of dot correction register are loaded as SID to bit 191-24 of 192bit shift register.

     Please read the bits data for dot correction data confirming.

     Best regards,

     Kazuya Nakai.