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TPS65381 Analog_MUX scaling and REV_ID not as per datasheet

Other Parts Discussed in Thread: TPS65381-Q1

On released TPS65381 chip, Analog MUX output scaling does not follow the divider ratio shown in table 4-3 of the Datasheet dated Dec 13 2013

 

Reading that we see on our board are as follows:

 

 

Voltage

Divider ratio

Scaled Expected

Hex
 reading

Apparent readings

Actual DIAG
Voltage

Error vs Expected

Apparent divider ratio

 

(V)

 

(V)

 

(V)

(V)

 

VDD5

5.02

2

2.50

855

2.604

2.72

4.15%

1.93

VDD6

5.85

3

1.95

71e

2.224

2.35

14.06%

2.63

VCP

16.7

13.5

1.24

6bc

2.104

2.4

70.12%

7.94

VSFB1

Pull-down

4

1.23

3f2

1.233

1.45

0.56%

 

VBAT_SAFING

10.01

10

1.00

700

2.188

2.55

118.75%

4.58

VBAT

10.01

10

1.00

6d5

2.135

2.5

113.50%

4.69

BG

1.226

1

1.23

7bb

2.416

2.5

97.04%

0.51

VMBG

1.226

1

1.23

7cf

2.440

2.5

99.04%

0.50

 

DIAG_OUT pin of TPS65381 is connected to ADC input of Hercules processor RM48L952ZWT though 1k resistor, with 2x 10nf of capacitance.

Channels on analog MUX switch state every 100ms, and settle in <5ms for each channel. ADC is sampled 90ms after the MUX switch.

 

Chip REV_ID register shows 0x30 while datasheet states it should be 0x31.

 

Is there an updated datasheet or any info on actual scaling factors?

 

  • Predraq,

     

    Your question has been forwarded to our TPS65381 expert. He will be back to you shortly.

     

  • 1. BG and VMBG should be 2.5v. What you measured agrees with the datasheet released on Feb 2013 saved in my hard disk. It also agrees with the measurement I did.  

    2. VBAT, VBAT_SAF and VCP have a very high output impedance (>1Mohm), please remove those 10nf caps and extend the ADC sampling time.

    Regards,

    Haixiao

  • 1. Per latest Datasheet (SLVSBC4A –MAY 2012–REVISED DECEMBER 2013) BG and VMBG should be 1.226V, as per table 4-3, which was not available in previous releases of the datasheet. DIAG_Out voltage for VBAT and VBAT_SAFING per same table should be around 1.000V and we are reading ~2.2V using ADC and 2.5V with open circuit.

    Is there an error in this table and released Datasheet?

    http://www.ti.com/product/tps65381-q1#technicaldocuments

    Is there an updated  errata sheet for production devices?

     We are using PRODUCTION TPS65381-q IC with marking 3BC085T and RD_DEV_REV of 0x30. We are seeing similar discrepancy on proto devices with marking 37CG6QT and also with RD_DEV_REV of 0x30 (which per datasheet should be 0x31, and was also a part of my question)

    2. Voltages were measured both with connection to ADC and with open circuit (nothing attached to pin), so high output impedance or the pin did not significantly affect the reading. I provided both readings in my table, ADC readings are somehwat lower, both show very significant discrepancy compared to table 4-3 above. 

     Per scope snapshots signal settles in <5ms even on high impedance traces and we are are sampling 90ms after the change of channel, so it is highly unlikely that longer wait would affect the reading.

  • The scope shot below shows DIAG_OUT signal with Hercules RM48 ADC input with 2x 10nF connected and with open circuit (liftted pin 7 of TPS65381). Other than noise level, there is no significant shift in mean voltage levels, so I would assume that ADC input impedance doesn not have much influence on DIAG_OUT voltage.

    On the other side, when board is tested over temperature, there is a significant variation of the reading, particularly at MUX-ed voltages with high output impedance. Same board was tested cool (25c), warm (55C) and hot (+85C). VBAT/VBAT_SAFING dropped by almost 300mV over temperature. But was still far from expected reading of 1.000V, for VBAT=10Vas used  in this test.

  • Can we at least get an answer on RD_DEV_REV reading of 0x30 vs specified 0x31 per datasheet?

     

    Is there any pending change of the TPS65381 datasheet, or errate sheet in progress for this RD_DEV_REV and Analog_MUX divider ratio ?

     

    Regards,

    Predrag

  • The Rev number does match only means you get a older device than what is in the market now. For example, on my bench, I have rev 0x20 and 0x11 TPS65381.

    This is the forum for the MCU. If it is a comunicaiton problem between the MCU and the TPS65381, you are welcome to post here. But here you ask for detail information about the TPS65381 itself, I strongly recommend you to post the questions to the power management forum:

    http://e2e.ti.com/support/power_management/pmu/f/200.aspx

    Thanks,

    Haixiao

  • We purchased 2000pcs of TPS65381QDAPRQ1 ICs in January, after the chip was released. We waited for several months to get released ICs. RD_DEV_REV reading is 0x30, and RD_DEV_ID is 0x01 on both proto devices (received in September 2013,  marked with -C1) and on devices we purchased after release date (1/6/14).

    Can you confirm that we actually received pre-production devices, not covered by released datasheet? If this is the case we would like to have all of these returned. If these are, in fact, production devices, we need to get either errata sheet or updated Datasheet.

    We see different behavior between proto and released devices on Analog_MUX/DIAG_OUT output (divider ratio on some monitored voltages differs a lot) so it appears that these pre-production and released devices actually are different and yet they have same RD_DEV_REV and RD_DEV_ID. It would be good if somebody from factory can take a look at these measurements.

    Since the problem we have is showing on analog interface between TPS65381 and RM48 Hercules, (DIAG_OUT to ADC_in) and controlled by SPI interface from Hercules, this forum seemed to be a logical place, since it was not obvious where the issue came from.

     If you can, please move this thread to Power management Forum, or close it and repost on that forum..

    Regards,

    Predrag

  • It runs out of my control since I am also user of the TPS65381 devices. All the TPS65381s on my bench are pre-production devices. I can not comment on what you saw. I will move your post to the Power management forum.

    Regards,

    Haixiao

  • Can we get an answer from somebody who worked on the TPS65381-Q1 datasheet, or from design engineer/factory?

  • Hi Predrag, sorry for the delay and confusion!

    The updated spec will be released by Tuesday next week.

    Please refer to attached documents for updated Analog MUX table and device revision register.

    2703.tps65381-amux-table-update.pdf

    2474.tps65381-DevRev-reg.pdf

    Regards,

    Samir

     

  • Thanks for the update. DEV_REV register value now matches what we read from IC.

     Analog MUX table appears correct when it comes to MAIN_BG and  VMON_BG (corrected from 1.226 to 2.5V, which is close what we measured, 2.4x), but it still shows wrong values for the following:

    VCP (13.5  - measured value close to~8)

    VBAT_SAFING (10, measured value around ~4.6)

    VBAT (same as VBAT_SAFING above)

    Hvala, Predrag

  • Hi Predrag,

    we have to chek and confirm VCP, VBAT_SAFING and VBAT values.

    Can you please confirm your setup (from your earlier posting)

    • DIAG_OUT pin of TPS65381 is connected to ADC input of Hercules processor RM48L952ZWT though 1k resistor, with 2x 10nf of capacitance.
    • Channels on analog MUX switch state every 100ms, and settle in <5ms for each channel. ADC is sampled 90ms after the MUX switch.

    Pozdrav,

    Samir

  • Hi Predrag,

    please find attached our lab meassurements.

    It was done in the setup without an exetrnal MCU ADC, by monitoring and meassuring the voltage level and signal settling time. The meassurements were done at two different VBAT levels (12V and 14V) and with two different sereies resistance values (0ohm and 1kohm).

    Let us know if you need more information.

    Pozdrav,

    Samir

    4010.TPS65381-AMUX-Lab-Results.pdf