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TPS62290 phase margin question

Other Parts Discussed in Thread: TPS62290, TPS62750, TPS62220, TPS62040, TPS62050, TPS62110

        
TPS62290 for Sartan VI FPGA

One of my customers wants to use TPS62290 to get 2.5V & 1.0 to his Spartan VI FPGA. His input is 4V, out put is 1V@1A. When he uses Switcher Pro, the software suggests to use 10uF cap. However, his load is 470uF, so he changes to that. The phase margin decreases by 30 degrees or so. His question is, would this cause any problem or not. regards

 

  • The TPS62240, TPS62260 ,and TPS62290 are not designed to work with large output capacitors.  The internal compensation is designed for smaller (4.7uF to 22uF) ceramic capacitors.  Using larger capacitors changes the power stage transfer function, which results in overall power supply instability.  Based on the datasheet recommendated ranges for inductor and capacitor, you need to keep the power stage LC corner frequency between 15.7kHz and 60kHz.  470uF of output capacitance is not recommended.  For larger output capacitance, I suggest the TPS62220, TPS62040, TPS62050, TPS62110, or TPS62750.