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LM34919C-Q1: Minimum ESR value calculation for LM34919C-Q1

Part Number: LM34919C-Q1

I was calculating the minimum required ESR value for LM34919C-Q1. On page# 17 in datasheet, there's a formula to calculate the minimum resistor in series with output cap (R3(min) in datasheet). If we want to calculate R3(min) then IOR should be maximum but in the datasheet formula it is reversed.

Is this a typo error or this is the correct way to calculate series resistor?

  • The key parameter is the ripple voltage required at the FB pin. You have to have at least 25 mV at the worst case condition and that is when the current is at the minimum. Higher ripple current will produce higher p-p ripple voltage across the same resistor. The datasheet equations look correct to me.
  • Thanks Jon.
    That's correct, the ripple current should be minimum to get at least 25mV ripple voltage at feedback. But if we consider minimum value of ripple current for calculation of series resistor then we'll get maximum value for this resistor instead of minimum value (Vripple=R3*Iripple).

    And also if we're not able to maintain this ripple voltage at feedback pin then probably over voltage & under voltage detection may not work properly as these mechanism required some amount of hysteresis .
    Correct me if I'm wrong.
  • No it is the minimum value of resistance. A larger value of resistance with the same current will give a larger ripple voltage which would be acceptable. I am not sure exactly what parameters are affected if the ripple voltage is below the minimum, but the primary requirement for the ripple voltage is the hysteretic comparator that sets the off time.
  • In our design, as per the calculation we should have 64m ohm for R3 resistor (datasheet reference) but we're not using any resistor in series with output cap. So what will be the impact on overall system as there will be only 2m ohm resistance because of cap ESR?
  • John, we don't want to use resistor in series with output caps as this series resistor will generate more ripple on output and load is very sensitive to ripples. So we're proceeding with minimum ripple configuration circuit (refer below snapshot) to generate ripple at FB pin.

    As per my understanding there's no such requirement for minimum ESR in this case. Cap ESR won't impact the stability of regulator.

    Please provide your thoughts on this.