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CCS/TPS92661-Q1: How to read the Diagnostic register for Status messages for Open and short LEDs, I need an example.

Part Number: TPS92661-Q1

Tool/software: Code Composer Studio

I am trying to read Diagnostic register on LED Matrix manager (TPS92661 Q1) for Open and Short LED status messages. Can anyone help me how this register can be accessed and processed in a code ?

I believe, this function,

 void lmm_rd_1_byte(Uint8 lmm, Uint8 regaddr) 

should be used, but I need more example code or data to understand how to get the data from this register and process it. Can anyone provide good example ? I am want to send this status messages over LIN.

  • Hello Guarav,

    I am tracking down somebody who can help you out with this. Hopefully you will get a response soon.

    Best regards,

    Clint

  • Hello Guarav,

    This is the response I received, I hope it helps.

    Regards,

    Clint

    "It is all explained in the spec. To me the sample the user should key in on is “Uint8 lmm_rd_1_reg(Uint8 lmm, Uint8 regaddr)”. Where the argument “regaddr” is either E0, E1 or E2. Once he has the data he wants he can parse it using the spec as well on page 30.

     

    7.4.13.8 Diagnostic Registers

    The diagnostic registers hold the results of various faults and status flags for the system. The diagnostic registers

    exist in the address range E0h to E2h.

    ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT

    E0h FAULTL FAULT[8:1] 00000000

    E1h FAULTH RESERVED FAULT[12:9] 00000000

    E2h CERRCNT CERRCNT[7:0] 00000000

    FAULT[12:1]: Fault Register

    0 = an LED fault has not occurred

    1 = an LED fault has occurred

    The LED open and short fault detection circuitry is sampled just before the corresponding bypass switch

    is closed. If a fault exists at this time instant, a 1 is latched into the associated FAULT register bit. The

    FAULT register bits must be cleared manually by writing them back to 0. If an LED fault condition still

    exists at the next PWM period, the device immediately resets the corresponding FAULT register bit to a

    1. Writing the FAULT register bits to 1 has no effect.

    CERRCNT[7:0]: CRC Error Count Register

    This register value is incremented each time a CRC error is received. This register may be read by the

    MCU and then written back to 0 to clear the count. The CERRCNT value saturates at FFh; it does not

    wrap back to 0 when it reaches FFh. The CERRCNT register is not automatically cleared when a

    communications reset is received. It must be cleared manually by writing it back to 0. Note that the

    CERRCNT register can be written to any 8-bit value. This is intended for diagnostic purposes."