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The UCC2753x datasheet calls out the feature "Output Held Low When Inputs are Floating or During VDD UVLO". However, nowhere is the behavior specified. Ideally, the datasheet should provide a curve that shows sinking current vs. Vdd for voltages below the UVLO threshold, assuming this function is self-biased, and not a simple resistor. Please provide whatever info is available that would allow one to determine whether this driver has sufficient sink capability to ensure that the driven device remains off when it is subjected to high power up dv/dt.
Additionally, the Enable Function description, diagrams, and truth table are inconsistent. Section 9.3.3 states "If desired, the Enable can also be driven by low-voltage logic to enable and disable the driver." However, it appears that the driver is never actually disabled (there is never a case when both high and low side devices are high impedance). Rather, it appears that all variants pull down when the device is not enabled - please confirm.
Lastly, the truth table for the UCC27537 appears to be wrong. The chip block diagram indicates that the second to last row (both enable and input high) should result in a high output - please confirm. Note that another poster requested clarification on this, but the question went unanswered.