LM10504: Non volatile programming the LDO

Hi,

I have assigned your request to responsible Applications Engineer and we will get back to you as soon as possible.

Regards,

Murthy

Due to the fact that the LDO is the first power rail to power-up and there is no reference to the LDO in the Register Map in the LM10504 datasheet, this power rail cannot be modified on-the-fly.

This would be a custom programming in the OTP (one-time programmable) bits of the digital block in the LM10504 device.

You can either contact your local TI sales rep to discuss the option for a custom OTP spin of the LM10504, or you might be able to use a hardware configurable PMIC like the TPS65023. The TPS65023 has 3 DC-DCs and 2 LDOs at 200mA. 3.3V is one of the default voltages of an LDO by pin-strapping the DEFLDO1/DEFLDO2 pins.

If you share your power requirements, we can determine the best PMIC for your design.

Hi Brian,

Thank you for your answer, but I was quite a bit confused, reading the datasheet.
On the front page, it says that the LM10504 contains "programmable low-dropout LDO 1.2V to 3.1V up to 250mA" but if you take a look at page 19 in the explanation of the startup-sequence, then it's written that the "LDO--> 3,2V"

But you say that it is possible to get the LM10504 custom programmed to deliver 3,3V on the LDO?

The reason why it is so interesting to us is:
High efficiency in PWM mode at low currents
SPI configurable power-rails
4 separate power-rails.

Our power needs are:
3V3 @ 20mA
1V2@ 50mA
2V5-->3V0 @ 100mA (configurable)
2V5-->3V0 @ 100mA (configurable)

Br,
Bent

Bent,

I was very happy to figure out the underlying datasheet discrepancy and verify the LM10506 could handle the loads in your system.

I am well aware that there is a large barrier to entry for custom programming on devices and generally suggest it as a last resort. In this case, I was just verifying for you that the LDO voltage is "programmable", but that it specifically means custom programming at the factory in this case.

Generally speaking, the word "configurable" or "programmable" can mean factory-programmed or modified on-the-fly using I2C or SPI. However, if the word "configurable" or "programmable" is mentioned and the setting does not appear in the Register Maps section of the datasheet, then this setting must always be factory programmed. The same is true for an "always-on" rail that is critical for powering the processor/controller responsible for I2C/SPI master duties. 

After receiving your reply pointing out the typo, I realized this question was less about custom programming than it was about validating which part had which settings and making sure the correct part number was suggested :-)

Again, thanks for pointing out the typo in the LM10504 datasheet and staying open-minded to using an alternative PMIC that fits your system better.

Brian,

Thank you for your further elaboration. I don't know if you have the possibility to change a little bit in the datasheets, or at least to throw in a word for us "datasheet-hunters"?

I would have liked (and saved quite a bit of my time, and yours too) if the word "factory" had been added before programmable/configurable. ;-)

Once again: Thank you very much for your help :-)

Brian,

A little question to the SPI-interface:
Normally, the SPI is a three wire interface, and I am trying to implement the PMIC in a three-wire system.
Is it possible to connect DI and DO together, or do I need a four-wire interface?

Best regards,
Bent

Funny you say that Bent: I always thought SPI was normally a four-wire interface. I guess everyone has a different perspective of what is "normal".

Let's assume no one is truly normal, and SPI is just simply an ambiguous specification (as opposed to I2C which is homogeneous because it is rigidly defined.)

The LM10504 and LM10506 are using a 4-wire SPI specification and the details of this devices characteristics are specified in the DIGITAL INTERFACE section on page 6.

Honestly, I cannot say 100% if shorting MISO to MOSI will create a SISO pin without any problems. In theory, it's the same structure as a general purpose I/O pin with both input buffer and output driver. However, when the Input is "listening" a GPIO pin must enter a Hi-Z state.

My concern would be that the MISO pin (DO in the LM1050x parts) will drive Low when the MOSI (DI pin) will be trying to listen to data from the Master. Since there is no mention of a Tri-state on MISO (high-Z, neither high-side or low-side FET driving). Therefore, my opinion is that this method will not work and a 4-Wire SPI Master should be used.

Brian,

Thanks :-)
My concern was also the tri-state or more the lack of tri-state on the data-out.

I'll make it work here, so once again thanks :-)