1. When VANA>UVLO and EN is high and NRST is low ,In this condition ,I think that all the regulators are disabled immediately, and all the register bits are reset to the default values.
Is my understanding correct ?
2.They would like to increase Buck0 Shutdown delay,this part can be set Shutdown delay up to 30ms by OTP set.
Can they set Shutdown delay time over 30ms ? If they can ,please let us know how to set.
3.They would like to keep Buck0 voltage as long as possible in shutdown.
If they place diode between L0 and Cout0,Does this part work correct ? please give us your comment.
Please let us your idea to keep Buck0 voltage as long as possible in shutdown.
