• State TI Thinks Resolved
  • Locked Locked
  • Replies 6 replies
  • Answers 1 answer
  • Subscribers 64 subscribers
  • Views 2184 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UC3846: duty cycle and dead time adjust

Ji wu Meng
Prodigy 80 points
Part Number: UC3846
Other Parts Discussed in Thread: UC1846

There are two questions about uc1846 as following:

1, Regarding the duty cycle adjust.
We can see the Figure 10 open loop test circuit on page 11 in spec of uc1846 in which the duty cycle can be adjusted via changing the voltage of pin5. but in fact, the duty cycle could not be adjusted when changing the voltage of pin5, I have no idea why ,please tell me the reason?

2.Regarding dead time adjust. when adding external PWM signal on SYNC (PIN10) and the CT (connect to between Pin8 and ground) will be shorted. So,
how much is the dead time ? Could Istill adjust the dead time?

  • 0
    TI__Expert 3095 points
    Hi Ji wu Meng,
    Please could you post a link to the document that you called 'spec of UC1846'? I checked the on line datasheet for this part but could not find Figure 10 on page 11.
    Thanks
    Joe Leisten
  • 0 in reply to Joe Leisten
    Prodigy 80 points

    Hi Joe Leisten,

    please see the datasheet for uc1846.

    www.ti.com/.../uc1846-ep.pdf

    Thanks,

    John

  • 0 in reply to Ji wu Meng
    TI__Expert 3095 points
    Hi John,
    The open loop schematic has a small error. There are two nodes labeled as IS+. Pin 3 should actually be labeled IS-.
    Using a scope please observe COMP (7) and C/S+(4). You should observe a ramp waveform on pin 4 which will follow the CT pin voltage.
    The ON period of the output should end when this ramp crosses the voltage on COMP (there is a small internal offset voltage).
    You should also find that when you 'adjust the duty cycle' the DC level on COMP rises or falls causing the output duty cycle to vary.
    Thanks
    Joe
  • 0 in reply to Joe Leisten
    Prodigy 80 points

    Hi Joe,

    Sorry for the late reply.

    Thanks for your supports! I got the duty cycle.

    Regarding to the dead time , we know the deadtime is set by capacitor Ct . My question is how much the deadtime is if using extral sync signal to control the PWM output  based on the Ct is grounded ?

    Thanks,

    John

  • 0 in reply to Ji wu Meng
    TI__Expert 3095 points

    Hi John,

    In this case I suspect that the dead time will be set by the width of the Synch signal applied.

    In normal operation the dead time is set by the time taken for the internal 12mA current source to discharge CT. Hence the dead time can be adjusted by varying the value of CT. This discharge period will also define the width of the synch pulse output on Pin 10.

    When CT is grounded the oscillator is effectively replaced by the external Synch signal applied to Pin 10. In this case the width of the Synch pulse should define the dead time.

    I hope this answers your question.

    Joe Leisten

  • 0 in reply to Joe Leisten
    Prodigy 80 points
    Hi Joe

    Very clear, I got it.

    thanks,

    John