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Original question:

TPS65721: Unusual current draw after dead battery

TPS65721: Unusual current draw after dead battery

Joice Markose
Prodigy 30 points
Part Number: TPS65721

Hi,

Does this chip can read the battery voltage ?

I have went through the datasheet but couldn't figure it out.

  • 0
    TI__Mastermind 30280 points

    Joice,

    The TPS65721 itself does not read the battery voltage. The PMIC has a single comparator for low battery voltage, set by VBAT[1..0] in Register 05h and the default value is 2.2V (00b). At this point, the battery is completely dead.

    There is also a VLOWV parameter (3.0V typical), and if the battery voltage is between 2.2V < VBAT < 3.0V then the PMIC will perform the following actions:

    "If the BAT voltage falls below VLOWV during the battery detection test, it indicates that the battery has been removed. The device then checks for battery insertion. The FET Q2 is turned on and sources IPRECHG out of BAT for the duration of tDET. If the battery voltage does not rise above VRCH, it indicates that a battery has been inserted, and a new charge cycle begins. If the voltage rises above VRCH, it is possible that a fully charged battery has been inserted. To check for this, IBAT(DET) is pulled from the battery for tDET. If the voltage falls below VLOWV, a battery is not present. The device continuously checks for the presence of a battery."

    This may be the root cause of the current draw you are seeing.

    The TPS657201 & TPS657202 have an Internal Analog Multiplexer (BAT, TS, TS_OUT) for the processor to read the battery voltage from an ADC, but the TPS65721 does not offer the multiplexer (MUX).

  • 0 in reply to Brian Berner
    Prodigy 30 points
    HI Brian,

    Thanks for the information, i have hot my tps65721 chip and tested it. it is doing great and i am very happy with its performance.

    But i am having some issues on getting the Push button interrupt from the chip. i have tried to configure the tps chip by writing 0xfd to the IRMAK2 register. i have used a 180k pull up to 3.3v for the INTR pin.

    also the interrupt pin is always low, regardless of whether i am writing to the mask register or not. since it is an active low pin, would there be something wrong in my design or should i have to configure the IC by writing to the registers?
  • 0 in reply to Joice Markose
    TI__Mastermind 30280 points

    Joice,

    A few comments here: 

    First of all, there are 3 IRMASKx registers (IRMASK0, IRMASK1, IRMASK2) and I would like to make sure that IRMASK0 and IRMASK1 both read back 0xFF. Assuming they both read back 0xFF and IRMASK2 is set to 0xFD, then you should only be getting an interrupt driven by the PB_STAT (push-button status change) event.

    Secondly, you mentioned you used a 180k pull-up to 3.3V on INTz. The TPS65721EVM-516 uses a 100k pull-up from the INTz pin to LDO1. Where is your 3.3V rail generated and why did you choose such a weak pull-up resistor? The current should be low for GPIOs, but maybe it is too low and the pull-up is not working as expected. Generally speaking, this would mean you have a non-zero voltage on the INTz pin. If you measure INTz and see a voltage between 0.4V and 1.8V, this could mean the pull-up resistor is just too weak.

     Finally, you are testing the interrupt from the push-button, but you did not say how the PB_IN pin is wired and I do not see any schematics you shared previously. I cannot simply assumed you have the PB_IN pin wired correctly. Although this may sound trivial, please verify PB_IN is pulled up to VSYS through a 100k resistor and is pulled to GND through a physical push-button (when the push-button is pressed, PB_IN is shorted to GND directly).

    If none of these suggestions work, you will need to share you schematic, scope shots of the issue occurring, and a data log of I2C transactions to the TPS65721 device. A "register dump", or reading all registers and sending them as a .CSV file can also be helpful.