LMR14206: LMR14206 TPS62097 failures

Please send you schematics and PCB layout.

Thanks

Hi,

Yes could you attached the schematic and layout of this design? 

Also what is the failure? Is it VIN got shorted on the IC?

Thanks

-Arief

I am new to this,  having difficulties attaching files.   I was told to PM you and have requested friendship as advised

Hi,

When you reply there is an option to attach file and you can browse your attached file in there. See below for the snapshot of it

Thanks

-Arief

LMR14206 failures issue input power PCB layout close up.docxPCB all tracks.pdfTx E08 - Schematic sheet 1.pdfTx E08 - Schematic sheet 9.pdf

Hi Frank, I put them in a reply with my notes,  hope this is accesible

thank you

Hi

have done a little more testing.  the TPS62097 input is s/c to ground (0.4 ohms on one and 4 ohms on another).   The output is also s/c to ground on one and o/c on the other.

I do not know if this helps.

Difficult to tell which went first.  The LMR 14206 was not functioning at all on either.

thanks

Barry

Gents,

final thought is, and I will repeat the observation,  that the most recent failure occurred with the unit functioning perfectly and had been for a minute or so, and seemingly the instant the external supply was turned on,  transitioning from 12 Volt internal to 24 Volts external the regulators both failed.

Maybe the 12 to 24 volt step blew the LMR14206 and thru to the TPS chip??

The rise time could not have been that fast IMO thru the EMC filter and the 1500uF reservoir cap,  but I will measure it and let you know.

all the best

Barry

Looking at the schematic, I notice that the input to the LMR14206 is at the junction of D25 and D26.

It would be good to look at that voltage.  I worry that the voltage at this node might tend to "charge pump"

due to the blocking diodes.

It appears that you are using less than the recommended input capacitor.

Looking at the layout I have a few suggestions for possible improvement:

1. The traces connected to the power components, inductor, Cout, Cin, Cboot should be wide and short.

2. I can not tell if you are using a ground plane on the side that the regulator is mounted.  This would be best practice.  

    The ground plane should connect all grounds of the power components mentioned above.

3. I can not find C69; it should be close to the regulator.

4. You may want to rotate C62 90 degrees to get it closer to the regulator.

These same general comments would apply to the TPS regulator.

Further testing on 5v rail power.docx

Thank you for your comments.  I have tested the circuit as described in the document I attached "Further testing..."

I cannot see any excessive voltages on VIN or the the 5 volts rail.   The charge pump idea was good and would have explained the issue, but I cannot see evidence on the few test cases I ran.

I can certainly take on board your comments re layout and increasing CIN...for the next iteration.

I can increase CIN for the current batch and see if this makes any difference.

However, I remain concerned that I really cannot see any clear explanation for the device failures.  But then I am not an expert in this field.

Do YOU feel the layout and slightly low CIN could possibly explain the failures?

Hi there,

I read the suggestions and thank you...but I still have a problem.

I increased the Cin value as suggested by adding a 6.8uF MLCC piggy backed on the 1 uF on a batch of ten unit.

Two failed,  one spectacularly and I have a trace of the Vin on power up and a photo of the destroyed device I can attach to the post.   For what it is worth the damage to the device seems to be concentrated in the Vin area...although it is not conclusive I agree.

There is a suspicious downward spike on the Vin trace on the one that blew up about 15 mS in.  Apart from that the Vin trace looks OK.Input rise with LMR fail.pdfInput rise with LMR OK.pdf 

I did reply to the post having made some more measurements in the area of the Cin volts but have seen no answer.

We are experiencing a greater than 20% failure rate on this device and would really appreciate any insight you may have.

I note the layout comments and they are all very helpful suggestions we can address, except the risk with continuing to use this device seems at the moment unacceptable.

Thank you

Barry Hills

Hi

one further observation is that on the other PCB that failed IC4 was changed (the LMR14206) and it all works now.   So it would indicate that it is a failure of this device which sometimes propagates through to the 3.3V regulator (TPS62097)....probably!

I guess my question is, if it is the layout,  then the single most obvious issue is the thin track from Cin to the IC4. 

It is 15 mm long  x 0.3mm wide and 0.6 mm above the power plane this would be approx 0.017 uH.   A good layout would reduce this by a factor of 10, maybe 20.

Could this stray inductance really destroy the device, or is it more of a potential EMC issue?  Which at low currents of 10 mA is unlikely to be an issue.

I totally accept the layout could be improved and can take on board the recommendations,  but is this really the root cause for destroying the devices?

If I understood the mechanism for the failure mode better it would be easier to have confidence the layout improvements would 100% solve the issue.

Many thanks for any insight you could provide.

all the best

Barry Hills

apologies in my previous note I said the LMR 14206 was IC4 I should have said IC2.

also the PCB on which the LMR IC2 device that was changed and looked good, subsequently had a failure of the 3.3V regulator after a few minutes which is now drawing excessive curren from  the repaired 5V line.

none of which is much help

I understand your concerns and doubts.  From the image you showed this could only be

high voltage stress, or a negative ring, in our opinion.  Even though you can not capture any spikes.  

One test may be to put a Zener clamp close to the input of the LMR device, and re-test.

Do you have a capture of the transition between 12V and 24V?

Also, maybe look at the SW node during some tests to see if there is any positive or negative spikes.

And be sure that the inductor is rated for the current limit of the LMR device.

Another path may be to use our EVMs along with your inputs and load and see if they survive.

Thank you for your observations.  I have attached the SW waveform, I can see no excessive ringing, although I accept the moment one applies a scope probe things change.  The inductor is Bourns SRR6038-270Y rated at 1.3 A.   I will see if I can find a suitable zener clamp device.   It is difficult to fit anything much in the limited space.   If it is down to ringing at Vin pin adding to the 24VDC input causing the voltage breakdown,  would a small 0.1uF cap  between the Vin pin and the adjacent ground via reduce the ringing sufficiently to make a difference in your opinion?LMR SW output.pdf

8171.LMR SW output.pdf

Sorry missed the Q You asked about the 214v/12v transition.   Most recent testing was straight 24v power up with additional 6.8uF Cin and 2 out of 10 failed.

I am going to try a batch with a 33v 5w zener tacked onto the Vin pin directly and the adjacent GND via

That will be monday or tuesday now

I will report back then

thank you

To answer you question about the 0.1uF, it would be worth an experiment.