TPS61022: Self Destructing

Andrew Charnley

Part Number: TPS61022

Although the title is blunt it is unfortunately exactly what is occurring, the chip is ending up shorting the input. It's now a real worry as I have it ready for two upcoming products. For one prototype I have 5 of these chips, the 3rd blew yesterday, I replaced with a 4th which instantly blew and I'm now on the 5th, which so far is working. Once blown the input measures 0.04ohm, so a direct short. At a guess an internal FET has failed.

Situation

The TPS61022 is currently boosting voltage from a current restricted supply of just 50mA (this blew the 4th). The input voltage ends up around 3V while the EN pin ends up at either equal to the output or about +0.4v above the input as part of the bootstrap operation. This is best shown with a schematic.

AC2 is presently a 6.5v DC 50mA supply. There is no load (or about 10mA max so basically nothing on the output of the TPS). The Vdd voltage is "var". The EN pin is attached to "Awake". The output of the TPS "5V" latches the EN pin. Once the voltage drops are factored in it's about 3.5V at the TPS Vdd.

As the 5551 has a voltage drop of about 1.2V and the 1n4448 is about 1v the EN pin can be slightly higher than the input voltage upon startup. There is nothing in the datasheet to say this isn't allowed but it is the only thing I can think of and is worth confirming.

The circuit itself is working fine, boosting to 5.25V. I haven't tried with any real load as my primary agenda is to find out why the chip keeps destroying itself.

over 4 years ago

0 Zack Liu over 4 years ago

TI__Mastermind 34201 points

Hi Andrew,

Sorry to hear that.

I didn't get your meaning here. How do you connect the TPS61022 Input and output.

Can you show the schematic of TPS61022 and the layout? We see some failure cases that customer didn't follow TI recommended layout.

0 Andrew Charnley over 4 years ago in reply to Zack Liu

Intellectual 640 points

To clarify the failure I'm seeing is a dead short (0.04~ ohm) across the input power, which in my case is labelled var. Something inside the TPS61022 is failing, like a protection diode, even though I haven't violated any of the specs (input voltage so far hasn't exceeded 4v). I'm leaning towards thinking there is a fault with the chip design, are there different silicon versions? I have a few weeks then the chip must be swapped for something else.

I'm running a rough prototype not a final design but the components are pretty close. The boosted output voltage is stable.

0 Andrew Charnley over 4 years ago in reply to Andrew Charnley

Intellectual 640 points

I'm starting to read on others that are having the same type of issue.

https://www.eevblog.com/forum/beginners/problem-with-boost-converter-201375

In my case for the input voltage I have 3x10uF MLCC's (not 2 as shown) for low ESR and a 330uF elect not shown.

0 Zack Liu over 4 years ago in reply to Andrew Charnley

TI__Mastermind 34201 points

Hi Andrew,

The failure root cause is related to the layout of TPS61022. For a high switching frequency DC/DC converter, the layout is really important because the PCB parasitic inductance, resistance will affect the normal regulation and reliability.

Please see the TPS61022 FAQ: https://e2e.ti.com/support/power-management/f/196/t/873821?tisearch=e2e-quicksearch&keymatch=TPS61022%20faq

And this application note will help you understand the reason and give a layout example.

0 Andrew Charnley over 4 years ago in reply to Andrew Charnley

Intellectual 640 points

Some further info.

The datasheet, pg13, states 3x22uF @ 50mV ripple. I'd used 4x10uF/16v (now boosted to 7x10uF/16v to see if it stops the chip burning).

The datasheet also states 1x10uF for the input but I found stability was only met with 2x10uF (I bumped to 3x10uF for a margin).

Pg15 described a phase capacitor for >40uF loads. Why wasn't this used in the recommended schematic example (3x22 > 40)? I haven't included it so far but now switching to 7x10uF perhaps I should add it.

0 Andrew Charnley over 4 years ago in reply to Zack Liu

Intellectual 640 points

Sorry can you be specific about this as the layout meets standard switch mode principles including the one mentioned on that link where the output capacitors are close to the chip. I agree that the user is experiencing the same issue but would like to identify the root cause.

In my case:

1. All components are very close to the chip, especially the inductor and capacitors.
2. All lines are extremely short.
3. Multiple vias.
4. no-fill under the inductor.

I also have no issue with output voltage or ripple (although I haven't tested under any great load).

0 Zack Liu over 4 years ago in reply to Andrew Charnley

TI__Mastermind 34201 points

Hi Andrew,

It's mainly because of the components placement, copper width and trace routing.

The output capacitor should be placed close to VOUT pin and GND pin with wide, short traces. Connect the output capacitor with copper polygon, not a thin trace otherwise it will introduces big PCB parasitic inductance. During switching, the PCB parasitic inductance will ring together with low-side FET output capacitors. So SW pin spikes is very high and cause low-side FET burned.

0 Andrew Charnley over 4 years ago in reply to Zack Liu

Intellectual 640 points

Ok, I'll have to start there then. Thanks.

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TPS61022: Self Destructing