Hi,
Can you please explain the difference between the "Enable threshold high" and "Enable high level" specs in the EC table?
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi,
Can you please explain the difference between the "Enable threshold high" and "Enable high level" specs in the EC table?
Hi Kelvin,
Looks like one is a DC spec and other is a spec when it is rising/falling. We will check and get back to you.
Regards,
Gerold
Please verify. Our customer is trying to decide. Their FPGA has 1.8V logic so they need to check the logic threshold.
The customer will be freezing the schematic soon. We're having a call with them tomorrow. Please try to get an answer.
Thank you for your timely support.
-Kelvin
Hi, Kelvin
1. Please ignore the "Enable high level" and "Enable low level" row, TPS65250/1 family devices can be programmed to different working mode or test mode through interfaced EN1/2/3 pin with GPIO, it not recommended to use this function, so please ignore it.
2. I also checked the limit for Enable threshold high/low, see below figure.
Enable signal must be higher than max value(1.9V).
Disable signal must be lower than min value(0.98V).
If so, 1.8V logic cannot work.