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Hi Team,
My Customer would like to know the internal circuit delay timing specification for Rail Enable pins?
As we know customer can program Enable power rail ON Delay timing to zero, so does it meant there is no any delay when UCD9090A is power on?
Customer is asking is there any delay when Rail enable issued?
Thanks
I also captured portion communication content with customer before.
Hello
The delay and processing is handled by firmware inside the chip therefore there are processing delay always. For example, device polls the CTRL_PIN state as fast as possible but this varies on the system. when the CTRL_PIN's state is determined, device will try to enable each rail there would be some overhead delay which is about 10us.
Does your customer have any specific requirements?
Regards
Yihe