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TPSM41625: Using enable and power good signals

Akshay hublikar
Intellectual 280 points
Part Number: TPSM41625

HI 

I want to use this IC for powering FPGA

Can I tie enable pin to pull down resistor to keep output on zero , So that it is enabled only when power good of previous IC is connected to enable of this IC ?

Also power good of this IC will be used to enable next IC 

Regards

Akshay

  • 0
    TI__Genius 17905 points

    Hi Akshay,

    The previous IC PGOOD is likely an open drain output like the TPSM41625 PGOOD, so it will have a pull-up resistor connected to a pull-up voltage that will create a voltage divider with any pull-down resistor that you add on the TPSM41625 EN pin. You will have to keep that divider in mind when choosing the resistor values to ensure the divider voltage is higher than the 1.75V max EN rising threshold of the TPSM41625. Also, the previous IC will not actively pull down its PG until some minimum VIN, so during startup the EN voltage may rise up due to the divider to the pull-up voltage if the pull-up voltage is up before the input supply to the previous IC.

    I hope these considerations I've mentioned make sense. If you need more inputs on this, it would be helpful to know the previous IC part number, the input supply, the pull-up voltage (and where it is coming from) and pull-up resistor value you plan to use.