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TPS650861: Questions of "User's Guide for NXP LS1043A"

Part Number: TPS650861
Other Parts Discussed in Thread: TIDA-01393

Hi support team,
I have three questions about "SLVUBK0B".

TPS65086100 User's Guide for NXP LS1043A
www.ti.com/.../slvubk0b.pdf

(Q1)
Is the following voltage output when the VSYS pin becomes +5.6V or more?
  LDO5P0(56pin)+5V / 100mA(TYP)
  LDO3P3(54pin)+3.3V / 40mA(MAX)
 LDOA1(9pin)+3.3V / 200mA(MAX)

(Q2)
Can the power outputs of (Q1) be used as a standby power supply for controlling the "CTL1 signal"?

(Q3)
Can I pull up the DATA, CLK, GPOx and CTLx signals by "LDO3P3 (54pin) +3.3V"?

Regards,
Dice-K

  • Dice-K,

    I have assigned this question to the expert on the TPS650861 device and you should receive a response today.

  • Hi Dice-K,

    Q1. Depending on if  you decide to configure LDOA1 in Always On mode (as opposed to being part of the sequence) it will be enabled at the same time as LDO5P0 and LDO3P3. If you include LDOA1 in the sequencing of your design it will go high when you determine it to in the sequence. LDO3P3 and LDO5P0 are enabled after the VSYS pin receives >5.6V. This is shown in the example power up sequence found on page 34 of the TPS650861 datasheet (found here).

    Q2. You can use LDOA1 to do this, although you will need to set the output voltage of LDOA1 to accommodate for the Logic High Level of 0.85V for these pins (I would recommend a 1.8V output). I would not recommend using LDO5P0 to do this. LDO5P0 is going to be a 5V output which we do not typically recommend using 5V on the CTLx pins. You can potentially use LDO3P3 however the current limit on this LDO is pretty low (40mA) so we usually do not make the recommendation to connect it as a pull up for rails. It is possible but will need to be validated for your case.

    Q3. As I mentioned in Q2, it is possible to do this however is not typically recommended and will need to be validated for your use case. We typically see customers use a discrete LDO or other external source to provide the pull ups necessary for this PMIC.

    Best regards,

    Layne J

  • Hi Layne,
    Thank you for your answer.

    I have additional questions about Q3.

    (Q3-1)
    I pull up each signal at +1.8V.
    Since the input voltage of the system is +12V, I want to generate this +1.8V from the LDOA1 (+3.3V) below via other external power IC.
    Is there a problem with the configuration?
    (Partly because +3.3V is used.)

    LDO5P0(56pin)+5V / 100mA ⇒ unused
    LDO3P3(54pin)+3.3V / 40mA ⇒ unused
    LDOA1(9pin)+3.3V / 200mA ⇒ Generates +1.8V voltage


    (Q3-2)
    TIDA-01393 is pulled up by LDO3P3. Is it specially validated?
    www.ti.com/.../TIDA-01393

    Best regards,
    Dice-K

  • Hi Dice-K,

    Q3-1. If you do not plan to use LDOA1 for another output on your board you can set it to output 1.8V directly and use this as your pull up. Have you determined a power tree? The OTP we have recommended for the NXP LS1043A utilizes LDOA1 in "Always on mode" which will allow you to have the output out LDOA1 as soon as is possible. If you do not need the 3.3V supply from LDOA1 then you can change this to 1.8V out and solve this issue without needing to use an external discrete. Or if a 3.3V pull up is needed you can use LDOA1 for this when set to 3.3V.

    Q3-2. Good catch. In that case yes that is an acceptable usage of LDO3P3 to pull those pins up. My concern is if you are using this LDO as a pull up for too many rails through out the board and potentially run in to current limiting issues as the current limit on that rail is low (like you mentioned). If a 3.3V pull up is needed I would recommend LDOA1 as mentioned above.

    Best regards,

    Layne J

  • Hi Layne,
    Thank you for your support.

    Since the 3.3V output is used for purposes other than pull-up, I wanna set the LDOA1 output to 3.3V.

    (1) Pull-up by 3.3V of LDOA1 output
    (2) A 1.8V output IC is placed after the 3.3V output of LDOA1 and pulled-up by the 1.8V output.

    Is (2) a better way than (1)?
    If there is no problem with 3.3V pull-up, I think (1) is simpler.

    However, since the ROC of the DIGITAL IO pins are -0.3 to 3.3V, I think that there is no margin in 3.3V pull-up.

    It depends on your answer below.
    "Q2. You can use LDOA1 to do this, although you will need to set the output voltage of LDOA1 to accommodate for the Logic High Level of 0.85V for these pins
    (I would recommend a 1.8V output)."

    I'm so sorry to bother you many times.

    Best regards,
    Dice-K

  • Hi Dice-K,

    As seen on the TIDA01393 schematic (found here), you are able to use a 3.3V pullup for these pins, my apologies if I caused any confusion with my previous answer. These pins have a logic level high of 0.85V in order to accommodate a 1.8V pullup, however 3.3V pullups are not a problem if they work in your case.

    Best regards,

    Layne J

  • Hi Layne,
    Thank you for your reply.

    Well then, I tell the customer that both (1) and (2) are okay.

    (1) Pull-up by 3.3V of LDOA1 output
    (2) A 1.8V output IC is placed after the 3.3V output of LDOA1 and pulled-up by the 1.8V output.

    Best regards,
    Dice-K

  • Hi Dice-K,

    Glad we were able to come to a solution. I am going to close this thread now. If you have any further questions please create a new thread.

    Best regards,

    Layne J