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Failure of MOSFET Driver TPS28225D &MOSFET's

pushpa T S
Prodigy 30 points

hi,

i have attached my schematic with this mail please verify why my MOSFET driver & mosfet's are failing .......

i am using 50KHz frequency to 3 pin of MOSFET driver.......

R22&R23 are current sensing resistor.....

C14 -- 220nF & C15 -1microF

on 7th - 4.5V to enable

 

 

0842.12V 3A MPPT Solar Charge Controller-SCHEMATIC1 (2).pdf

  • 0
    Prodigy 180 points

    Did you ever resolve this issue?  I plan to use the TPS28225D in a buck converter design and your failure report makes me a bit nervous...

     

    I know that too much stray circuit board inductance in the layout can cause instability in Sync MOSFET drivers with adaptive deadband. Was that the problem?

  • 0 in reply to David Gunderson
    Prodigy 30 points

    dont get nervous try the application circuit & proceed.....but in my circuit it was failed & could not resolve also ....so i droped the IC

     

     

    regard's

    Pushpa

  • 0
    TI__Prodigy 335 points

    Hello,

    The application looks typical so there is no reason for driver and FETs to fail unless there are layout and decoupling issues that cause large ringing exceeding the driver or FET rating or causing shoot through during the turning off of high side FET. The following things are most critical to meet:

    1. Have the ceramic decoupling capacitors C15 and C14 as close as possible to the driver. BTW, there are no values of these capacitors in schematic? Are these capacitors populated on board?

    2. The driver has to be as close as possible to the FETs and parasitic inductances of traces minimized.

    3.  The drive current paths must be separated from the power stage currents.

    4. The loop C10, C11, R22, Q3, Q4 needs to be minimized. What is the purpose of current sensing using R22? Is it possible to move R22 to the left from C10? If this resistor is to measure the average input current then if is probably possible. This would allow to minimize the loop and reduce the ringing at FETs Q3 and Q4. The resistor R22 could also introduce large parasitic inductance especially if it is wire wounded type.

    5. Review the drive voltage waveforms to ensure the ringing does not cause spurious turning on of Q4 while you are turning on Q3. Consider adding resistor between gate of upper FET Q3 and the output of driver to mitigate the issue if this is the case. With the good layout usually such gate resistor is not needed.

    If these are the issues causing the failure, it is nothing to do with the driver itself. Any driver IC and FETs require approach described above for the reliable and efficient operation.

    Regards,

    Rais Miftakhutdinov

  • 0 in reply to Rais Miftakhutdinov
    TI__Prodigy 335 points

    Apologize for the typo, but in the first sentence I mean during "turning on of high side FET", not turning off.

    Regards,

    Rais

     

  • 0
    Prodigy 60 points

    I am building a spin-off of the eTesla circuit for a higher output voltage. Vdd = 5V and Vin = 20V.

    I used the eTesla pcb layout and am using a uC to control the Enable line for duty cycle.

    I tried tying the EN line high with a 47k just to test that portion of the IC and 1 out of 3 ICs have no output. 

    I hard wired the EN line to Vdd and still no good. There is no sequencing diagram in the data sheet, but should be if it is important.

     I have a free-running PWM signal, so that "come out of UVD or Overheat" precsution gets overridden right away by the next high to low to high PWM.

    Any ideas why the IC hangs up? Changing ICs SOMETIMES fixes the problem. Comments?