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TMS320VC5402: Suspected IPROG Memory sector error in temperature

Part Number: TMS320VC5402

Dear Community,

I am contacting you because I have seen a failure we observed in one of our board.

The analysis brought us on a failure in the internal memory of the DSP in temperature preventing the SPI to be fully function in temperature.

In temperature (90°C) we are loosing the clearing of the INT of the MCP2515.

 

The investigation was the following:

With our firmware version, we found that we had this failure in temperature.

With a same firmware recompiled we still have the failure (not a compilation error).

We have added 3 NOP operation in a particular space of the memory map creating an offset in the SPI functions.

The board is working again with this new recompiled version.

Below is the difference in the .map generated (Version with the bug in temperature in the left, Version recompiled with 3 NOP operation in the right)

If I correctly understood, the moved part is in the LD_IPROG.
At the startup the LD_IPROG is copied to IPROG. 

As the copy of LD_IPROG to IPROG is done once at the startup, the fact that the board is falling even when it was started up at 25°C and failure happen at 90°C, that mean IPROG might have some damage.

So, now how can I test the IPROG? Is it readable via JTAG XDS100v3? via Boundary Scan ? 

Do you have any code to run a self-test on IPROG?

Can I run a feather code to read and write the IPROG sector (0x1000 to 0x3F80) ?

Thank you in advance,


Regards,

  • Hi Avid,

    After you rebuild your code, how are you loading it to the board for execution? Do you have a JTAG connection, or are you bootloading the image?

    I'm checking whether we have any test code for memories on the VC5402 which we could provide to you.

    Can you please further explain "feather code"? I'm not familiar with that terminology.

    Regards,
    Frank

  • Hi Frank,


    Thanks a lot for your answer. I have a JTAG connection, so I am loading a bootloader loader and then I am loading the new code through the bootloader.

    I hope our reprogramation process is clear for you now.

    I am looking forward hearing from you if you have any code for testing this (critical) part of the memory.

    By "feather code" I was thinking of a very light code with simple commands to read and write in the IPROG. The challenge is that this code should be light enough to not need any data in the address 01baed and be able to read and write at that address.

    Regards,


    Avid NAEIMI

  • Hi Avid,

    Do you observe the failure when the board temperature is below 90 C?

    If the board fails above 90 C, and is then allowed to cool to a temperature below 90 C, does the board fail if the software is re-booted / executed ?

    Do you have an identical board that doesn't fail above 90 C with the original software?

    Do you know for certain other memories might be corrupt above 90 C, or do you suspect IPROG because this is the only memory which is being used after boot?

    Judging from your memory map, the IPROG and IDATA memory regions are DARAM. The DARAM address range 0060h−3FFFh, and this is mapped to program/data space when OVLY=1.

    You mentioned LD_IPROG is copied to IPROG at run time. Is this part of the boot process? Is LD_IPROG part of extended program space with XPC=1? If so, this memory should be external. Can you load and execute a program to test IPROG from LD_IPROG?

    Regards,
    Frank

  • Hi Frank,

    The board fails above 90°C.

    The board is not failing if it is rebooted below 90°C.

    The board is failing if rebooted in temperature (above 90°C).

    Yes I have another board that doesn't fail above 90°C with the original software.

    Actually I will need to test both IPROG and LD_IPROG to be sure.

    The fact is I don't know how to test this address range because it is bigger than 4 usual digits.

    Does the IPROG readable and writable? Same question for LD_IPROG

    Yes LD_IPROG is copied into IPROG during boot process.

    LD_IPROG might be external but I am not sure, how can I confirm? We have a flash memory.
    Actually, I am pretty lost on the address range because we have an external RAM, external flash and I also would like to know from which address range I am in the internal DARAM, external RAM, external flash...

    I really would like to load and execute a program to test IPROG from LD_IPROG, or even better compare IPROG with LD_IPROG and send back differences. But how is it possible?
    IPROG seems to be a critical point where the code to execute is loaded, so how can I test this?


    Thank you in advance,


    Regards,


    Avid NAEIMI

  • Hi Avid,

    Actually, I am pretty lost on the address range because we have an external RAM, external flash and I also would like to know from which address range I am in the internal DARAM, external RAM, external flash...
    The fact is I don't know how to test this address range because it is bigger than 4 usual digits.

    Please see these documents for details on the C5402 memory

    The only on-chip memories are ROM and DARAM. Key mode/status bits which affect whether these internal memories are available in the memory map include MP/nMC (sampled at reset), OVLY, and DROM. Any memory ranges not used for internal memory are external memory. Hence I believe LD_IPROG is external.

    Judging from your memory map, DARAM is mapped to program/data space, where IPROG in program space and IDATA in data space.

    Does the IPROG readable and writable? Same question for LD_IPROG

    IPROG should be readable/writeable from the C54x core or from CCS/JTAG.

    LD_IPROG should should be readable from the C54x core or from CCS/JTAG. It will be writable if it's RAM.

    I think it should be possible to read/write memories from CCS/JTAG. Can you connect to the board and open and memory window in CCS? If so, place the desired memory base address into the memory window.

    I really would like to load and execute a program to test IPROG from LD_IPROG

    You'll need to determine what types of memories (RAM or flash) are mapped to particular external ranges in your memory map. Then you should be able to write a program which links to external RAM, and which can be loaded via JTAG.

    even better compare IPROG with LD_IPROG and send back differences.

    Does your flash provide XIP? If not, then you'll need some RAM from which to execute the program. Perhaps you could connect to the processor via CCS/JTAG, and attempt to read these memory ranges into files for comparison.

    Regards,
    Frank