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TMS320C6678: Does the openmp use Hardware QMSS?

Shine
Genius 13655 points
Part Number: TMS320C6678

Hello Champs,

OpenMP：openmp_dsp_c667x_2_06_02_01

Does the openmp use Hardware QMSS? It seems that the openmp source code doesn't use the related HW qmss API in C:\ti\openmp_dsp_c667x_2_06_02_01\packages\ti\runtime\openmp\src\tomp_qmss.c, it uses software queues in C:\ti\openmp_dsp_c667x_2_06_02_01\packages\ti\runtime\openmp\src\tomp_queues.c instead. 

#if defined (TI_C6678) || defined (TI_C6636)
#define TOMP_DEVICE_NUM_CORES (8)
#define TOMP_DEVICE_HAS_HW_QUEUES 0
#define TOMP_DEVICE_HAS_HW_SEMAPHORES 1
#define TOMP_DEVICE_HAS_HW_SPINLOCKS 0
#define TOMP_DEVICE_HAS_XMC 1
#define TOMP_DEVICE_HAS_MSMC 1
#elif defined (TI_66AK2G)
#define TOMP_DEVICE_NUM_CORES (1)
#define TOMP_DEVICE_HAS_HW_QUEUES 0
#define TOMP_DEVICE_HAS_HW_SEMAPHORES 1
#define TOMP_DEVICE_HAS_HW_SPINLOCKS 0
#define TOMP_DEVICE_HAS_XMC 1
#define TOMP_DEVICE_HAS_MSMC 1
#elif defined (TI_C6670)
#define TOMP_DEVICE_NUM_CORES (4)
#define TOMP_DEVICE_HAS_HW_QUEUES 0
#define TOMP_DEVICE_HAS_HW_SEMAPHORES 1
#define TOMP_DEVICE_HAS_HW_SPINLOCKS 0
#define TOMP_DEVICE_HAS_XMC 1
#define TOMP_DEVICE_HAS_MSMC 1
#elif defined (TI_C6657)
#define TOMP_DEVICE_NUM_CORES (2)
#define TOMP_DEVICE_HAS_HW_QUEUES 0
#define TOMP_DEVICE_HAS_HW_SEMAPHORES 1
#define TOMP_DEVICE_HAS_HW_SPINLOCKS 0
#define TOMP_DEVICE_HAS_XMC 1
#define TOMP_DEVICE_HAS_MSMC 1
#elif defined (TI_AM572)
#define TOMP_DEVICE_NUM_CORES (2)
#define TOMP_DEVICE_HAS_HW_QUEUES 0
#define TOMP_DEVICE_HAS_HW_SEMAPHORES 0
#define TOMP_DEVICE_HAS_HW_SPINLOCKS 1
#define TOMP_DEVICE_HAS_XMC 1
#define TOMP_DEVICE_HAS_MSMC 0
#else
#define "Error, device not supported"
#endif

 Thanks.
Rgds

Shine

  • 0
    TI__Genius 13655 points

    Hello Champs,

    Any suggestions on this issue?

    Thanks.
    Rgds
    Shine

  • 0 in reply to Shine
    TI__Mastermind 20575 points

    Shine,

    Softwares like OpenMP, IPC, NETCP etc are developed and maintained for the series of devices (Keystone-I and Keystone-II --- C665x, C667X, K2X etc ) 

    The same software has been used /ported for different SOCs. ( which doesnot have QMSS - e.g., AM572x  )

    So, according to different availability of subsystems like CPPI,QMSS etc, it  will be enabled or disabled in the softwares. ( For easy software maintenance)

    And also, it seems, the same capability of the QMSS is achieved through the Software based Queues.

    Please do check, whether the QMSS itself is not needed/used for OPENMP of C6678... and the same functionalities are attained through software queues.

    Regards

    Shankari