AM3356: AM3356: TI DP83869 Phy chip 100BASE-FX Fiber not working with AM335x

         #################################################################
         #################################################################
         #######################################################################
###################
         3.7 MiB/s
done
Bytes transferred = 96731136 (5c40000 hex)

NAND erase: device 0 offset 0x1c0000, size 0xfe40000
Erasing at 0xffe0000 -- 100% complete.
OK

NAND write: device 0 offset 0x1c0000, size 0x5c40000
 96731136 bytes written: OK
resetting ...

U-Boot SPL 2018.01-00444-g96cdbef-dirty (Oct 06 2021 - 15:25:23)
Trying to boot from NAND
PHY Address [0] = 10
PHY Address [1] = 11


Warning: ethernet@4a100000 MAC addresses don't match:
Address in ROM is          d0:39:72:3f:ad:06
Address in environment is  00:25:97:ce:ee:ec
eth0: ethernet@4a100000
Hit any key to stop autoboot:  0
Boot attempt 0 of 15. Cur bank: bank1
ubi0: attaching mtd1
ubi0: scanning is finished
ubi0: volume 7 ("SETTINGS") re-sized from 17 to 622 LEBs
ubi0: attached mtd1 (name "mtd=7", size 254 MiB)
ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 512
ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
ubi0: good PEBs: 2034, bad PEBs: 0, corrupted PEBs: 0
ubi0: user volume: 8, internal volumes: 1, max. volumes count: 128
ubi0: max/mean erase counter: 1/0, WL threshold: 4096, image sequence number: 42
4784515
ubi0: available PEBs: 0, total reserved PEBs: 2034, PEBs reserved for bad PEB ha
ndling: 40
Read 0 bytes from volume BANK1_FIT to 82000000
No size specified -> Using max size (4317184)
ubi0: detaching mtd1
ubi0: mtd1 is detached
## Loading kernel from FIT Image at 82000000 ...
   Using 'conf@am335x-evm.dtb' configuration
   Trying 'kernel@1' kernel subimage
     Description:  Linux kernel
     Created:      2021-11-12  12:18:19 UTC
     Type:         Kernel Image
     Compression:  uncompressed
     Data Start:   0x82000114
     Data Size:    3842560 Bytes = 3.7 MiB
     Architecture: ARM
     OS:           Linux
     Load Address: 0x80008000
     Entry Point:  0x80008000
     Hash algo:    sha1
     Hash value:   6b391c8640ffe8f36c84798fa5db4032a002b5cb
   Verifying Hash Integrity ... sha1+ OK
## Loading fdt from FIT Image at 82000000 ...
   Using 'conf@am335x-evm.dtb' configuration
   Trying 'fdt@am335x-evm.dtb' fdt subimage
     Description:  Flattened Device Tree blob
     Created:      2021-11-12  12:18:19 UTC
     Type:         Flat Device Tree
     Compression:  uncompressed
     Data Start:   0x823aa414
     Data Size:    37683 Bytes = 36.8 KiB
     Architecture: ARM
     Hash algo:    sha1
     Hash value:   89ea2bc0d2603a3b68607dddec062e71e9281fc5
   Verifying Hash Integrity ... sha1+ OK
   Booting using the fdt blob at 0x823aa414
   Loading Kernel Image ... OK
   Loading Device Tree to 8bf15000, end 8bf21332 ... OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.14.67-gd315a9bb00 (root@RND-UbuntuV14) (gcc versi
on 7.3.0 (GCC)) #12 PREEMPT Thu Nov 11 20:36:38 IST 2021
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instructio
n cache
[    0.000000] OF: fdt: Machine model: SYNC 2000-M5
[    0.000000] Memory policy: Data cache writeback
[    0.000000] efi: Getting EFI parameters from FDT:
[    0.000000] efi: UEFI not found.
[    0.000000] cma: Reserved 48 MiB at 0x8d000000
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (neon)
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 64960
[    0.000000] Kernel command line: console=ttyO0,115200n8 resetDefault=no root=
ubi0:BANK1_ROOTFS rw rootfstype=ubifs ubi.mtd=7,2048
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Memory: 197272K/262144K available (8192K kernel code, 319K rwdata
, 2476K rodata, 1024K init, 275K bss, 15720K reserved, 49152K cma-reserved, 0K h
ighmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xd0800000 - 0xff800000   ( 752 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xd0000000   ( 256 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc0900000   (9184 kB)
[    0.000000]       .init : 0xc0c00000 - 0xc0d00000   (1024 kB)
[    0.000000]       .data : 0xc0d00000 - 0xc0d4fc08   ( 320 kB)
[    0.000000]        .bss : 0xc0d4fc08 - 0xc0d949a4   ( 276 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] Preemptible hierarchical RCU implementation.
[    0.000000]  Tasks RCU enabled.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrup
ts
[    0.000000] OMAP clockevent source: timer2 at 24000000 Hz
[    0.000021] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478
484971ns
[    0.000048] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max
_idle_ns: 79635851949 ns
[    0.000064] OMAP clocksource: timer1 at 24000000 Hz
[    0.000288] timer_probe: no matching timers found
[    0.000551] Console: colour dummy device 80x30
[    0.000588] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
[    0.000598] This ensures that you still see kernel messages. Please
[    0.000607] update your kernel commandline.
[    0.000647] Calibrating delay loop... 597.60 BogoMIPS (lpj=2988032)
[    0.118794] pid_max: default: 32768 minimum: 301
[    0.119040] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.119060] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.120045] CPU: Testing write buffer coherency: ok
[    0.120977] Setting up static identity map for 0x80100000 - 0x80100060
[    0.121184] Hierarchical SRCU implementation.
[    0.121635] EFI services will not be available.
[    0.123425] devtmpfs: initialized
[    0.134163] random: get_random_u32 called from bucket_table_alloc+0x8c/0x1ac
with crng_init=0
[    0.134773] VFP support v0.3: implementor 41 architecture 3 part 30 variant c
 rev 3
[    0.135140] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, ma
x_idle_ns: 19112604462750000 ns
[    0.135171] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.139985] pinctrl core: initialized pinctrl subsystem
[    0.140903] DMI not present or invalid.
[    0.141410] NET: Registered protocol family 16
[    0.144338] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.149411] omap_hwmod: rtc: no dt node
[    0.149434] ------------[ cut here ]------------
[    0.149480] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2494 _
init.constprop.20+0x1e0/0x4a4
[    0.149492] omap_hwmod: rtc: doesn't have mpu register target base
[    0.149502] Modules linked in:
[    0.149527] CPU: 0 PID: 1 Comm: swapper Not tainted 4.14.67-gd315a9bb00 #12
[    0.149537] Hardware name: Generic AM33XX (Flattened Device Tree)
[    0.149547] Backtrace:
[    0.149592] [<c010bcac>] (dump_backtrace) from [<c010bf90>] (show_stack+0x18/
0x1c)
[    0.149610]  r7:00000009 r6:00000000 r5:c0a9b60c r4:cc03fe28
[    0.149646] [<c010bf78>] (show_stack) from [<c082bc64>] (dump_stack+0x24/0x28
)
[    0.149673] [<c082bc40>] (dump_stack) from [<c0128d24>] (__warn+0xe8/0x100)
[    0.149693] [<c0128c3c>] (__warn) from [<c0128d7c>] (warn_slowpath_fmt+0x40/0
x48)
[    0.149711]  r9:c0d4fc40 r8:c0c3b820 r7:00000000 r6:c0d0ae84 r5:00000000 r4:c
0a9b8c0
[    0.149732] [<c0128d40>] (warn_slowpath_fmt) from [<c0c0ac38>] (_init.constpr
op.20+0x1e0/0x4a4)
[    0.149745]  r3:c0ad2780 r2:c0a9b8c0
[    0.149754]  r4:c0d0ae40
[    0.149773] [<c0c0aa58>] (_init.constprop.20) from [<c0c0b428>] (__omap_hwmod
_setup_all+0x48/0x108)
[    0.149791]  r9:c0d4fc40 r8:c0c3b820 r7:c0d4fc40 r6:ffffe000 r5:c0d07ee0 r4:c
0d0ae40
[    0.149811] [<c0c0b3e0>] (__omap_hwmod_setup_all) from [<c010196c>] (do_one_i
nitcall+0x4c/0x170)
[    0.149823]  r5:c0c0b3e0 r4:00000000
[    0.149852] [<c0101920>] (do_one_initcall) from [<c0c00eac>] (kernel_init_fre
eable+0x144/0x1dc)
[    0.149869]  r8:c0c3b820 r7:c0d4fc40 r6:00000003 r5:c0c4c334 r4:c0b695c0
[    0.149891] [<c0c00d68>] (kernel_init_freeable) from [<c0840870>] (kernel_ini
t+0x10/0x11c)
[    0.149908]  r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:
c0840860
[    0.149919]  r4:00000000
[    0.149936] [<c0840860>] (kernel_init) from [<c0108068>] (ret_from_fork+0x14/
0x2c)
[    0.149948]  r5:c0840860 r4:00000000
[    0.149970] ---[ end trace ecafd5a089fce370 ]---
[    0.163695] omap_hwmod: debugss: _wait_target_disable failed
[    0.217741] cpuidle: using governor ladder
[    0.217790] cpuidle: using governor menu
[    0.223682] OMAP GPIO hardware version 0.1
[    0.234253] omap-gpmc 50000000.gpmc: could not find pctldev for node /ocp/l4_
wkup@44c00000/scm@210000/pinmux@800/nandflash_pins_s0, deferring probe
[    0.236712] No ATAGs?
[    0.236731] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.254112] edma 49000000.edma: TI EDMA DMA engine driver
[    0.258416] omap_i2c 44e0b000.i2c: could not find pctldev for node /ocp/l4_wk
up@44c00000/scm@210000/pinmux@800/pinmux_i2c0_pins, deferring probe
[    0.258506] omap_i2c 4802a000.i2c: could not find pctldev for node /ocp/l4_wk
up@44c00000/scm@210000/pinmux@800/pinmux_i2c1_pins, deferring probe
[    0.258562] omap_i2c 4819c000.i2c: could not find pctldev for node /ocp/l4_wk
up@44c00000/scm@210000/pinmux@800/pinmux_i2c2_pins, deferring probe
[    0.258687] media: Linux media interface: v0.10
[    0.258743] Linux video capture interface: v2.00
[    0.259157] pps_core: LinuxPPS API ver. 1 registered
[    0.259170] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giome
tti <giometti@linux.it>
[    0.259200] PTP clock support registered
[    0.259249] EDAC MC: Ver: 3.0.0
[    0.259808] dmi: Firmware registration failed.
[    0.260379] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
[    0.260821] Advanced Linux Sound Architecture Driver Initialized.
[    0.262295] clocksource: Switched to clocksource timer1
[    0.273234] NET: Registered protocol family 2
[    0.274186] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    0.274235] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
[    0.274272] TCP: Hash tables configured (established 2048 bind 2048)
[    0.274400] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.274427] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.274628] NET: Registered protocol family 1
[    0.275188] RPC: Registered named UNIX socket transport module.
[    0.275205] RPC: Registered udp transport module.
[    0.275215] RPC: Registered tcp transport module.
[    0.275225] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.276348] hw perfevents: no interrupt-affinity property for /pmu, guessing.

[    0.276500] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counter
s available
[    0.278363] workingset: timestamp_bits=14 max_order=16 bucket_order=2
[    0.284321] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.285252] NFS: Registering the id_resolver key type
[    0.285310] Key type id_resolver registered
[    0.285321] Key type id_legacy registered
[    0.285380] ntfs: driver 2.1.32 [Flags: R/O].
[    0.288039] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 2
45)
[    0.288065] io scheduler noop registered
[    0.288076] io scheduler deadline registered
[    0.288352] io scheduler cfq registered (default)
[    0.288366] io scheduler mq-deadline registered
[    0.288377] io scheduler kyber registered
[    0.290145] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[    0.357417] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled
[    0.361444] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 30, base_baud =
3000000) is a 8250
[    1.195374] console [ttyS0] enabled
[    1.200238] 48022000.serial: ttyS1 at MMIO 0x48022000 (irq = 31, base_baud =
3000000) is a 8250
[    1.210319] 481a6000.serial: ttyS2 at MMIO 0x481a6000 (irq = 32, base_baud =
3000000) is a 8250
[    1.220314] 481aa000.serial: ttyS3 at MMIO 0x481aa000 (irq = 33, base_baud =
3000000) is a 8250
[    1.231247] omap_rng 48310000.rng: Random Number Generator ver. 20
[    1.253206] brd: module loaded
[    1.264883] loop: module loaded
[    1.270958] libphy: Fixed MDIO Bus: probed
[    1.342371] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1
000000
[    1.350092] libphy: 4a101000.mdio: probed
[    1.420534] davinci_mdio 4a101000.mdio: phy[10]: device 4a101000.mdio:0a, dri
ver TI DP83869
[    1.428985] davinci_mdio 4a101000.mdio: phy[11]: device 4a101000.mdio:0b, dri
ver TI DP83869
[    1.438543] cpsw 4a100000.ethernet: Detected MACID = 00:25:97:ce:ee:ec
[    1.445316] cpsw 4a100000.ethernet: initialized cpsw ale version 1.4
[    1.451706] cpsw 4a100000.ethernet: ALE Table size 1024
[    1.457049] cpsw 4a100000.ethernet: cpts: overflow check period 500 (jiffies)

[    1.465309] cpsw 4a100000.ethernet: cpsw: Detected MACID = 00:25:97:ce:ee:ed
[    1.474047] i2c /dev entries driver
[    1.478108] IR NEC protocol handler initialized
[    1.482755] IR RC5(x/sz) protocol handler initialized
[    1.487833] IR RC6 protocol handler initialized
[    1.492404] IR JVC protocol handler initialized
[    1.496955] IR Sony protocol handler initialized
[    1.501590] IR SANYO protocol handler initialized
[    1.506332] IR Sharp protocol handler initialized
[    1.511057] IR MCE Keyboard/mouse protocol handler initialized
[    1.516931] IR XMP protocol handler initialized
[    1.523655] cpuidle: enable-method property 'ti,am3352' found operations
[    1.530813] sdhci: Secure Digital Host Controller Interface driver
[    1.537111] sdhci: Copyright(c) Pierre Ossman
[    1.541863] sdhci-pltfm: SDHCI platform and OF driver helper
[    1.548296] ledtrig-cpu: registered to indicate activity on CPUs
[    1.558398] NET: Registered protocol family 10
[    1.564918] Segment Routing with IPv6
[    1.568708] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    1.575712] NET: Registered protocol family 17
[    1.580515] Key type dns_resolver registered
[    1.585248] omap_voltage_late_init: Voltage driver support not added
[    1.598471] omap-gpmc 50000000.gpmc: GPMC revision 6.0
[    1.603870] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000
[    1.612280] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
[    1.618848] nand: Micron MT29F2G08ABAEAH4
[    1.622942] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB siz
e: 64
[    1.630663] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme
[    1.636195] 8 ofpart partitions found on MTD device omap2-nand.0
[    1.642232] Creating 8 MTD partitions on "omap2-nand.0":
[    1.647612] 0x000000000000-0x000000020000 : "NAND.SPL"
[    1.654154] 0x000000020000-0x000000040000 : "NAND.SPL.backup1"
[    1.661074] 0x000000040000-0x000000060000 : "NAND.SPL.backup2"
[    1.668097] 0x000000060000-0x000000080000 : "NAND.SPL.backup3"
[    1.675110] 0x000000080000-0x000000180000 : "NAND.u-boot"
[    1.682002] 0x000000180000-0x0000001a0000 : "NAND.u-boot-env1"
[    1.689002] 0x0000001a0000-0x0000001c0000 : "NAND.u-boot-env2"
[    1.695978] 0x0000001c0000-0x000010000000 : "NAND.RBlob"
[    1.852606] tps65910 0-002d: No interrupt support, no core IRQ
[    1.860918] vrtc: supplied by vbat
[    1.867318] random: fast init done
[    1.871744] vio: supplied by vbat
[    1.876756] vdd1: supplied by vbat
[    1.882158] vdd2: supplied by vbat
[    1.889195] vdig1: supplied by vbat
[    1.894260] vdig2: supplied by vbat
[    1.899273] vpll: supplied by vbat
[    1.904261] vdac: supplied by vbat
[    1.909188] vaux1: supplied by vbat
[    1.914259] vaux2: supplied by vbat
[    1.919252] vaux33: supplied by vbat
[    1.924388] vmmc: supplied by vbat
[    1.929316] vbb: supplied by vbat
[    1.934387] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    1.941536] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 100 kHz
[    1.948521] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 100 kHz
[    1.955972] ubi0: attaching mtd7
[    3.395851] ubi0: scanning is finished
[    3.423122] ubi0: attached mtd7 (name "NAND.RBlob", size 254 MiB)
[    3.429273] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
[    3.436304] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 512
[    3.443067] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
[    3.450063] ubi0: good PEBs: 2034, bad PEBs: 0, corrupted PEBs: 0
[    3.456236] ubi0: user volume: 8, internal volumes: 1, max. volumes count: 12
8
[    3.463520] ubi0: max/mean erase counter: 1/0, WL threshold: 4096, image sequ
ence number: 424784515
[    3.472651] ubi0: available PEBs: 0, total reserved PEBs: 2034, PEBs reserved
 for bad PEB handling: 40
[    3.482015] ubi0: background thread "ubi_bgt0d" started, PID 45
[    3.488361] hctosys: unable to open rtc device (rtc0)
[    3.488961] lis3_reg: disabling
[    3.494358] ALSA device list:
[    3.494364]   No soundcards found.
[    3.508006] UBIFS (ubi0:3): background thread "ubifs_bgt0_3" started, PID 46
[    3.597533] UBIFS (ubi0:3): start fixing up free space
[   10.200458] UBIFS (ubi0:3): free space fixup complete
[   10.247450] UBIFS (ubi0:3): UBIFS: mounted UBI device 0, volume 3, name "BANK
1_ROOTFS"
[   10.255551] UBIFS (ubi0:3): LEB size: 126976 bytes (124 KiB), min./max. I/O u
nit sizes: 2048 bytes/2048 bytes
[   10.265550] UBIFS (ubi0:3): FS size: 61583360 bytes (58 MiB, 485 LEBs), journ
al size 8634368 bytes (8 MiB, 68 LEBs)
[   10.276082] UBIFS (ubi0:3): reserved for root: 0 bytes (0 KiB)
[   10.281951] UBIFS (ubi0:3): media format: w4/r0 (latest is w5/r0), UUID A0D60
8A4-F0DF-44D9-AF8E-318F1ED4577E, small LPT model
[   10.295226] VFS: Mounted root (ubifs filesystem) on device 0:14.
[   10.303396] devtmpfs: mounted
[   10.308340] Freeing unused kernel memory: 1024K
[   10.432388] NOHZ: local_softirq_pending 40
INIT: version 2.88 booting
[   10.572351] NOHZ: local_softirq_pending 202
[   10.890059] UBIFS (ubi0:5): default file-system created
[   10.902352] UBIFS (ubi0:5): background thread "ubifs_bgt0_5" started, PID 53
[   11.026363] UBIFS (ubi0:5): UBIFS: mounted UBI device 0, volume 5, name "LICE
NSE"
[   11.033982] UBIFS (ubi0:5): LEB size: 126976 bytes (124 KiB), min./max. I/O u
nit sizes: 2048 bytes/2048 bytes
[   11.044036] UBIFS (ubi0:5): FS size: 3047424 bytes (2 MiB, 24 LEBs), journal
size 1015809 bytes (0 MiB, 6 LEBs)
[   11.054202] UBIFS (ubi0:5): reserved for root: 143937 bytes (140 KiB)
[   11.060681] UBIFS (ubi0:5): media format: w5/r0 (latest is w5/r0), UUID B3AEB
ACA-CEE4-4250-A6A6-899FBCB7AE0B, small LPT model
[   11.090396] UBIFS (ubi0:6): default file-system created
[   11.102525] UBIFS (ubi0:6): background thread "ubifs_bgt0_6" started, PID 55
[   11.226700] UBIFS (ubi0:6): UBIFS: mounted UBI device 0, volume 6, name "LOG"

[   11.233971] UBIFS (ubi0:6): LEB size: 126976 bytes (124 KiB), min./max. I/O u
nit sizes: 2048 bytes/2048 bytes
[   11.244020] UBIFS (ubi0:6): FS size: 35553280 bytes (33 MiB, 280 LEBs), journ
al size 1777664 bytes (1 MiB, 14 LEBs)
[   11.254529] UBIFS (ubi0:6): reserved for root: 1679269 bytes (1639 KiB)
[   11.261182] UBIFS (ubi0:6): media format: w5/r0 (latest is w5/r0), UUID A0610
443-FF80-47D5-91F0-07FB6A033959, small LPT model
[   11.293273] UBIFS (ubi0:7): default file-system created
[   11.302524] UBIFS (ubi0:7): background thread "ubifs_bgt0_7" started, PID 57
[   11.429726] UBIFS (ubi0:7): UBIFS: mounted UBI device 0, volume 7, name "SETT
INGS"
[   11.437428] UBIFS (ubi0:7): LEB size: 126976 bytes (124 KiB), min./max. I/O u
nit sizes: 2048 bytes/2048 bytes
[   11.447477] UBIFS (ubi0:7): FS size: 77709312 bytes (74 MiB, 612 LEBs), journ
al size 3936256 bytes (3 MiB, 31 LEBs)
[   11.457990] UBIFS (ubi0:7): reserved for root: 3670402 bytes (3584 KiB)
[   11.464688] UBIFS (ubi0:7): media format: w5/r0 (latest is w5/r0), UUID 57B74
D04-EE2F-43D7-A160-B53E11640E6D, small LPT model
[   11.552355] NOHZ: local_softirq_pending 40
[   11.652370] NOHZ: local_softirq_pending 40
[   11.752373] NOHZ: local_softirq_pending 40
[   12.082378] NOHZ: local_softirq_pending 40
[   13.522372] NOHZ: local_softirq_pending 40
[   13.622402] NOHZ: local_softirq_pending 40
[   13.662396] NOHZ: local_softirq_pending 40
[   13.673448] random: ssh-keygen: uninitialized urandom read (32 bytes read)
Generating public/private rsa key pair.
Your identification has been saved in /id_rsa.
Your public key has been saved in /id_rsa.pub.
The key fingerprint is:
SHA256:4YuKRa98gvI2YVw4THB/Yup3Hntvj1yESzURvn1pp0g root@(none)
The key's randomart image is:
+---[RSA 2048]----+
|...         o.   |
| ...       . .   |
| o .+ . .   +    |
|  +o.o . . o +  .|
| ..o.   S o E .oo|
| .+. . . o + ..o.|
| ..oo = . . o .  |
|. +=.=.o...o     |
| +o.+oo. o+..    |
+----[SHA256]-----+
Starting udev
[   16.912374] NOHZ: local_softirq_pending 40
[   16.991315] udevd[119]: starting version 3.2.5
[   17.015380] random: udevd: uninitialized urandom read (16 bytes read)
[   17.026346] random: udevd: uninitialized urandom read (16 bytes read)
[   17.040535] random: udevd: uninitialized urandom read (16 bytes read)
[   17.058089] udevd[119]: specified group 'lp' unknown
[   17.092994] udevd[120]: starting eudev-3.2.5
[   20.875339] urandom_read: 1 callbacks suppressed
[   20.875356] random: dd: uninitialized urandom read (512 bytes read)
INIT: Entering runlevel: 5
Configuring network interfaces... [   21.159502] net eth0: initializing cpsw ver
sion 1.12 (0)
[   21.168090] libphy: PHY 4a101000.mdio:02 not found
[   21.173015] net eth0: phy "4a101000.mdio:02" not found on slave 0, err -19
[   21.189647] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[   21.448228] random: crng init done
modprobe: FATAL: Module ip_tables not found in directory /lib/modules/4.14.67-gd
315a9bb00
iptables-restore v1.6.2: iptables-restore: unable to initialize table 'nat'

Error occurred at line: 2
Try `iptables-restore -h' or 'iptables-restore --help' for more information.
run-parts: /etc/network/if-up.d/iptables: exit status 2
modprobe: FATAL: Module ip_tables not found in directory /lib/modules/4.14.67-gd
315a9bb00
iptables-restore v1.6.2: iptables-restore: unable to initialize table 'nat'

Error occurred at line: 2
Try `iptables-restore -h' or 'iptables-restore --help' for more information.
run-parts: /etc/network/if-up.d/iptables: exit status 2
mount: mounting securityfs on /sys/kernel/security failed: No such file or direc
tory
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Starting OpenBSD Secure Shell server: sshd
  generating ssh RSA key...
  generating ssh ECDSA key...
  generating ssh DSA key...
  generating ssh ED25519 key...
done.
hwclock: can't open '/dev/misc/rtc': No such file or directory
starting rsyslogd ... done
health is active
grep: /home/lite/out/Config.xml: No such file or directory
sed: /home/lite/out/settings.xml: No such file or directory
cat: can't open '/home/lite/out/Config.xml': No such file or directory
cat: can't open '/home/lite/out/Config.xml': No such file or directory

Poky (Yocto Project Reference Distro) 2.5.1 sync261 /dev/console

sync261 login: killall: slistend: no process killed
killall: sreadd: no process killed

// SPDX-License-Identifier: GPL-2.0
/* Driver for the Texas Instruments DP83869 PHY
 * Copyright (C) 2019 Texas Instruments Inc.
 */

#include <linux/ethtool.h>
#include <linux/kernel.h>
#include <linux/mii.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy.h>
#include <linux/delay.h>

#include <dt-bindings/net/ti-dp83869.h>

#define DP83869_PHY_ID		0x2000a0f1
#define DP83869_DEVADDR		0x1f

#define MII_DP83869_PHYCTRL	0x10
#define MII_DP83869_MICR	0x12
#define MII_DP83869_ISR		0x13
#define DP83869_CTRL		0x1f
#define DP83869_CFG4		0x1e

/* Extended Registers */
#define DP83869_GEN_CFG3    0x0031
#define DP83869_RGMIICTL	0x0032
#define DP83869_STRAP_STS1	0x006e
#define DP83869_RGMIIDCTL	0x0086
#define DP83869_IO_MUX_CFG	0x0170
#define DP83869_OP_MODE		0x01df
#define DP83869_FX_CTRL		0x0c00

#define DP83869_SW_RESET	BIT(15)
#define DP83869_SW_RESTART	BIT(14)

/* MICR Interrupt bits */
#define MII_DP83869_MICR_AN_ERR_INT_EN			BIT(15)
#define MII_DP83869_MICR_SPEED_CHNG_INT_EN		BIT(14)
#define MII_DP83869_MICR_DUP_MODE_CHNG_INT_EN	BIT(13)
#define MII_DP83869_MICR_PAGE_RXD_INT_EN		BIT(12)
#define MII_DP83869_MICR_AUTONEG_COMP_INT_EN	BIT(11)
#define MII_DP83869_MICR_LINK_STS_CHNG_INT_EN	BIT(10)
#define MII_DP83869_MICR_FALSE_CARRIER_INT_EN	BIT(8)
#define MII_DP83869_MICR_SLEEP_MODE_CHNG_INT_EN	BIT(4)
#define MII_DP83869_MICR_WOL_INT_EN				BIT(3)
#define MII_DP83869_MICR_XGMII_ERR_INT_EN		BIT(2)
#define MII_DP83869_MICR_POL_CHNG_INT_EN		BIT(1)
#define MII_DP83869_MICR_JABBER_INT_EN			BIT(0)

#define MII_DP83869_BMCR_DEFAULT	(BMCR_ANENABLE | \
					 BMCR_FULLDPLX | \
					 BMCR_SPEED1000)

#define MII_DP83869_BMCR_DEFAULT_FX	(BMCR_FULLDPLX | \
					 BMCR_SPEED100)

/* This is the same bit mask as the BMCR so re-use the BMCR default */
#define DP83869_FX_CTRL_DEFAULT	MII_DP83869_BMCR_DEFAULT

/* CFG1 bits */
#define DP83869_CFG1_DEFAULT	(ADVERTISE_1000HALF | \
				 ADVERTISE_1000FULL | \
				 CTL1000_AS_MASTER)

/* RGMIICTL bits */
#define DP83869_RGMII_TX_CLK_DELAY_EN		BIT(1)
#define DP83869_RGMII_RX_CLK_DELAY_EN		BIT(0)

/* STRAP_STS1 bits */

#define DP83869_STRAP_OP_MODE_MASK      	GENMASK(11, 9)
#define DP83869_STRAP_STS1_RESERVED			BIT(11)
#define DP83869_STRAP_MIRROR_ENABLED		BIT(12)


/* PHYCTRL bits */
#define DP83869_RX_FIFO_SHIFT	12
#define DP83869_TX_FIFO_SHIFT	14

/* PHY_CTRL lower bytes 0x48 are declared as reserved */
#define DP83869_PHY_CTRL_DEFAULT	0x48
#define DP83869_PHYCR_FIFO_DEPTH_MASK	GENMASK(15, 12)
#define DP83869_PHYCR_RESERVED_MASK	BIT(11)

/* RGMIIDCTL bits */
#define DP83869_RGMII_TX_CLK_DELAY_SHIFT	4

/* IO_MUX_CFG bits */
#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL	0x1f

#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX	0x0
#define DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN	0x1f
#define DP83869_IO_MUX_CFG_CLK_O_SEL_MASK	(0x1f << 8)
#define DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT	8

/* CFG3 bits */
#define DP83869_CFG3_PORT_MIRROR_EN              BIT(0)

/* CFG4 bits */
#define DP83869_INT_OE	BIT(7)

/* OP MODE */
#define DP83869_OP_MODE_MII			BIT(5)
#define DP83869_SGMII_RGMII_BRIDGE		BIT(6)

enum {
	DP83869_PORT_MIRRORING_KEEP,
	DP83869_PORT_MIRRORING_EN,
	DP83869_PORT_MIRRORING_DIS,
};

struct dp83869_private {
	int tx_fifo_depth;
	int rx_fifo_depth;
	int io_impedance;
	int port_mirroring;
	bool rxctrl_strap_quirk;
	int clk_output_sel;
	int mode;
};

static int dp83869_ack_interrupt(struct phy_device *phydev)
{
	int err = phy_read(phydev, MII_DP83869_ISR);

	if (err < 0)
		return err;

	return 0;
}

static int dp83869_config_intr(struct phy_device *phydev)
{
	int micr_status = 0;

	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
		micr_status = phy_read(phydev, MII_DP83869_MICR);
		if (micr_status < 0)
			return micr_status;

		micr_status |=
			(MII_DP83869_MICR_AN_ERR_INT_EN |
			MII_DP83869_MICR_SPEED_CHNG_INT_EN |
			MII_DP83869_MICR_AUTONEG_COMP_INT_EN |
			MII_DP83869_MICR_LINK_STS_CHNG_INT_EN |
			MII_DP83869_MICR_DUP_MODE_CHNG_INT_EN |
			MII_DP83869_MICR_SLEEP_MODE_CHNG_INT_EN);

		return phy_write(phydev, MII_DP83869_MICR, micr_status);
	}

	return phy_write(phydev, MII_DP83869_MICR, micr_status);
}

static int dp83869_config_port_mirroring(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	u16 val;

	val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_GEN_CFG3);

	if (dp83869->port_mirroring == DP83869_PORT_MIRRORING_EN)
		val |= DP83869_CFG3_PORT_MIRROR_EN;
	else
		val &= ~DP83869_CFG3_PORT_MIRROR_EN;

	phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_GEN_CFG3, val);
/*
	if (dp83869->port_mirroring == DP83869_PORT_MIRRORING_EN)
		phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_GEN_CFG3,
				 DP83869_CFG3_PORT_MIRROR_EN);
	else
		phy_clear_bits_mmd(phydev, DP83869_DEVADDR, DP83869_GEN_CFG3,
				   DP83869_CFG3_PORT_MIRROR_EN);
*/

	return 0;
}


static int dp83869_set_strapped_mode(struct phy_device *phydev)
{
       struct dp83869_private *dp83869 = phydev->priv;
       u16 val;

       val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
       if (val < 0)
               return val;


       dp83869->mode = (u16) ((val & DP83869_STRAP_OP_MODE_MASK) >> 9);

		if (val & DP83869_STRAP_MIRROR_ENABLED)
			dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN;
		else
			dp83869->port_mirroring = DP83869_PORT_MIRRORING_DIS;

       return 0;
}


#ifdef CONFIG_OF_MDIO
static int dp83869_of_init(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	struct device *dev = &phydev->mdio.dev;
	struct device_node *of_node = dev->of_node;
	int ret;


	if (!of_node)
	{
		return -ENODEV;
	}

	dp83869->io_impedance = -EINVAL;


	/* Optional configuration */
	ret = of_property_read_u32(of_node, "ti,clk-output-sel",
				   &dp83869->clk_output_sel);
	if (ret || dp83869->clk_output_sel > DP83869_CLK_O_SEL_REF_CLK)
		dp83869->clk_output_sel = DP83869_CLK_O_SEL_REF_CLK;

	ret = of_property_read_u32(of_node, "ti,op-mode", &dp83869->mode);
	if (ret == 0) {
		if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET ||
		    dp83869->mode > DP83869_SGMII_COPPER_ETHERNET)
			return -EINVAL;
	}

	if (of_property_read_bool(of_node, "ti,max-output-impedance"))
		dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MAX;
	else if (of_property_read_bool(of_node, "ti,min-output-impedance"))
		dp83869->io_impedance = DP83869_IO_MUX_CFG_IO_IMPEDANCE_MIN;

	if (of_property_read_bool(of_node, "enet-phy-lane-swap"))
		dp83869->port_mirroring = DP83869_PORT_MIRRORING_EN;
	else
		dp83869->port_mirroring = DP83869_PORT_MIRRORING_DIS;

	if (of_property_read_u32(of_node, "rx-fifo-depth",
				 &dp83869->rx_fifo_depth))
		dp83869->rx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;

	if (of_property_read_u32(of_node, "tx-fifo-depth",
				 &dp83869->tx_fifo_depth))
		dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB;

	return 0;
}
#else
static int dp83869_of_init(struct phy_device *phydev)
{
	 return dp83869_set_strapped_mode(phydev);
}
#endif /* CONFIG_OF_MDIO */

static int dp83869_configure_rgmii(struct phy_device *phydev,
				   struct dp83869_private *dp83869)
{
	int ret, val;

	if (phy_interface_is_rgmii(phydev)) {
		val = phy_read(phydev, MII_DP83869_PHYCTRL);
		if (val < 0)
			return val;

		val &= ~DP83869_PHYCR_FIFO_DEPTH_MASK;
		val |= (dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT);
		val |= (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT);

		ret = phy_write(phydev, MII_DP83869_PHYCTRL, val);
		if (ret)
			return ret;
	}


	if (dp83869->io_impedance >= 0)
	{

		/*phy_modify_mmd(phydev, DP83869_DEVADDR,
			       DP83869_IO_MUX_CFG,
			       DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL,
			       dp83869->io_impedance &
			       DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL);*/

			val = phy_read_mmd(phydev, DP83869_DEVADDR,
					   DP83869_IO_MUX_CFG);

			val &= ~DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL;
			val |= dp83869->io_impedance &
			       DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL;

			phy_write_mmd(phydev, DP83869_DEVADDR,
				      DP83869_IO_MUX_CFG, val);
	}

	return ret;
}

static int dp83869_configure_mode(struct phy_device *phydev,
				  struct dp83869_private *dp83869)
{
	int phy_ctrl_val;
	int ret, val;

	int status;

	if (dp83869->mode < DP83869_RGMII_COPPER_ETHERNET ||
	    dp83869->mode > DP83869_SGMII_COPPER_ETHERNET)
	    {
		return -EINVAL;
	}

	/* Below init sequence for each operational mode is defined in
	 * section 9.4.8 of the datasheet.
	 */
	ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
			    dp83869->mode);
	if (ret)
	{
		return ret;
	}

	ret = phy_write(phydev, MII_BMCR, MII_DP83869_BMCR_DEFAULT);
	if (ret)
	{
		return ret;
	}

	phy_ctrl_val = (dp83869->rx_fifo_depth << DP83869_RX_FIFO_SHIFT |
			dp83869->tx_fifo_depth << DP83869_TX_FIFO_SHIFT |
			DP83869_PHY_CTRL_DEFAULT);

	switch (dp83869->mode) {
	case DP83869_RGMII_COPPER_ETHERNET:

		if (ret)
			return ret;

		ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT);
		if (ret)
			return ret;

		ret = dp83869_configure_rgmii(phydev, dp83869);
		if (ret)
			return ret;
		break;
	case DP83869_RGMII_SGMII_BRIDGE:
		/*phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
			       DP83869_SGMII_RGMII_BRIDGE,
			       DP83869_SGMII_RGMII_BRIDGE);*/


		val = phy_read_mmd(phydev, DP83869_DEVADDR,
				   DP83869_OP_MODE);

		val &= ~DP83869_SGMII_RGMII_BRIDGE;
		val |= DP83869_SGMII_RGMII_BRIDGE;

		phy_write_mmd(phydev, DP83869_DEVADDR,
		  DP83869_OP_MODE, val);

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;

		break;
	case DP83869_1000M_MEDIA_CONVERT:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;
		break;
	case DP83869_100M_MEDIA_CONVERT:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;
		break;
	case DP83869_SGMII_COPPER_ETHERNET:
		ret = phy_write(phydev, MII_DP83869_PHYCTRL,
				phy_ctrl_val);
		if (ret)
			return ret;

		ret = phy_write(phydev, MII_CTRL1000, DP83869_CFG1_DEFAULT);
		if (ret)
			return ret;

		ret = phy_write_mmd(phydev, DP83869_DEVADDR,
				    DP83869_FX_CTRL, DP83869_FX_CTRL_DEFAULT);
		if (ret)
			return ret;

		break;
	case DP83869_RGMII_1000_BASE:
		break;
	case DP83869_RGMII_100_BASE:				/* RGMII to 100 Base  */

		status = phy_read(phydev, MII_BMCR);

		ret = phy_write(phydev, MII_BMCR, MII_DP83869_BMCR_DEFAULT_FX);


		if (ret)
			return ret;

		phydev->speed = SPEED_100;
		break;
	default:

		return -EINVAL;
	};

	return 0;
}

static int dp83869_config_init(struct phy_device *phydev)
{
	struct dp83869_private *dp83869 = phydev->priv;
	int ret, val;


	ret = dp83869_configure_mode(phydev, dp83869);
	if (ret)
	{
		return ret;
	}

	/* Enable Interrupt output INT_OE in CFG4 register */
	if (phy_interrupt_is_valid(phydev)) {
		val = phy_read(phydev, DP83869_CFG4);
		val |= DP83869_INT_OE;
		phy_write(phydev, DP83869_CFG4, val);
	}

	if (dp83869->port_mirroring != DP83869_PORT_MIRRORING_KEEP)
		dp83869_config_port_mirroring(phydev);

	/* Clock output selection if muxing property is set */
	if (dp83869->clk_output_sel != DP83869_CLK_O_SEL_REF_CLK)
	{
		/*phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_IO_MUX_CFG,
			       DP83869_IO_MUX_CFG_CLK_O_SEL_MASK,
			       dp83869->clk_output_sel <<
			       DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT); */

		val = phy_read_mmd(phydev, DP83869_DEVADDR,
				   DP83869_IO_MUX_CFG);

		val &= ~DP83869_IO_MUX_CFG_CLK_O_SEL_MASK;
		val |= dp83869->clk_output_sel <<
			       DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT;

		phy_write_mmd(phydev, DP83869_DEVADDR,
			DP83869_IO_MUX_CFG, val);
	}

	return 0;
}

static int dp83869_probe(struct phy_device *phydev)
{
	struct dp83869_private *dp83869;
	int ret;

	dp83869 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83869),
			       GFP_KERNEL);
	if (!dp83869)
		return -ENOMEM;


	phydev->priv = dp83869;

	ret = dp83869_of_init(phydev);
	if (ret)
	{
		return ret;
	}

	return dp83869_config_init(phydev);
}

static int dp83869_phy_reset(struct phy_device *phydev)
{
	int ret;

	ret = phy_write(phydev, DP83869_CTRL, DP83869_SW_RESET);
	if (ret < 0)
		return ret;

	usleep_range(10, 20);

	/* Global sw reset sets all registers to default.
	 * Need to set the registers in the PHY to the right config.
	 */
	return dp83869_config_init(phydev);
}

static struct phy_driver dp83869_driver[] = {
	{
		//PHY_ID_MATCH_MODEL(DP83869_PHY_ID),
		.phy_id		= DP83869_PHY_ID,
		//.phy_id_mask = 0xfffffff0,
		.name		= "TI DP83869",

		.probe          = dp83869_probe,
		.config_init	= dp83869_config_init,
		.soft_reset	= dp83869_phy_reset,

		/* IRQ related */
		.ack_interrupt	= dp83869_ack_interrupt,
		.config_intr	= dp83869_config_intr,

		.suspend	= genphy_suspend,
		.resume		= genphy_resume,
	},
};
module_phy_driver(dp83869_driver);

static struct mdio_device_id __maybe_unused dp83869_tbl[] = {
	{ DP83869_PHY_ID, 0xfffffff0  },
	{ }
};
MODULE_DEVICE_TABLE(mdio, dp83869_tbl);

MODULE_DESCRIPTION("Texas Instruments DP83869 PHY driver");
MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com");
MODULE_LICENSE("GPL v2");

/*
 * Device Tree Source for AM33XX SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>

/ {
	compatible = "ti,am33xx";
	interrupt-parent = <&intc>;
	#address-cells = <1>;
	#size-cells = <1>;
	chosen { };

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart3;
		serial3 = &uart5;
		d_can0 = &dcan0;
		d_can1 = &dcan1;
		usb0 = &usb0;
		usb1 = &usb1;
		phy0 = &usb0_phy;
		phy1 = &usb1_phy;
		ethernet0 = &cpsw_emac0;
		ethernet1 = &cpsw_emac1;
		spi0 = &spi0;
		spi1 = &spi1;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		cpu@0 {
			compatible = "arm,cortex-a8";
			enable-method = "ti,am3352";
			device_type = "cpu";
			reg = <0>;

			operating-points-v2 = <&cpu0_opp_table>;

			clocks = <&dpll_mpu_ck>;
			clock-names = "cpu";

			clock-latency = <300000>; /* From omap-cpufreq driver */
			cpu-idle-states = <&mpu_gate>;
		};

		idle-states {
			mpu_gate: mpu_gate {
				compatible = "arm,idle-state";
				entry-latency-us = <40>;
				exit-latency-us = <90>;
				min-residency-us = <300>;
				ti,idle-wkup-m3;
			};
		};
	};

	cpu0_opp_table: opp-table {
		compatible = "operating-points-v2-ti-cpu";
		syscon = <&scm_conf>;

		/*
		 * The three following nodes are marked with opp-suspend
		 * because the can not be enabled simultaneously on a
		 * single SoC.
		 */
		opp50-300000000 {
			opp-hz = /bits/ 64 <300000000>;
			opp-microvolt = <950000 931000 969000>;
			opp-supported-hw = <0x06 0x0010>;
			opp-suspend;
		};

		opp100-275000000 {
			opp-hz = /bits/ 64 <275000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x01 0x00FF>;
			opp-suspend;
		};

		opp100-300000000 {
			opp-hz = /bits/ 64 <300000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x06 0x0020>;
			opp-suspend;
		};

		opp100-500000000 {
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

		opp100-600000000 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x06 0x0040>;
		};

		opp120-600000000 {
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <1200000 1176000 1224000>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

		opp120-720000000 {
			opp-hz = /bits/ 64 <720000000>;
			opp-microvolt = <1200000 1176000 1224000>;
			opp-supported-hw = <0x06 0x0080>;
		};

		oppturbo-720000000 {
			opp-hz = /bits/ 64 <720000000>;
			opp-microvolt = <1260000 1234800 1285200>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

		oppturbo-800000000 {
			opp-hz = /bits/ 64 <800000000>;
			opp-microvolt = <1260000 1234800 1285200>;
			opp-supported-hw = <0x06 0x0100>;
		};

		oppnitro-1000000000 {
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <1325000 1298500 1351500>;
			opp-supported-hw = <0x04 0x0200>;
		};
	};

	pmu {
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
	};

	/*
	 * The soc node represents the soc top level view. It is used for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
			pm-sram = <&pm_sram_code
				   &pm_sram_data>;
		};
	};

	/*
	 * XXX: Use a flat representation of the AM33XX interconnect.
	 * The real AM33XX interconnect network is quite complex. Since
	 * it will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		l4_wkup: l4_wkup@44c00000 {
			compatible = "ti,am3-l4-wkup", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x44c00000 0x280000>;

			wkup_m3: wkup_m3@100000 {
				compatible = "ti,am3352-wkup-m3";
				reg = <0x100000 0x4000>,
				      <0x180000	0x2000>;
				reg-names = "umem", "dmem";
				ti,hwmods = "wkup_m3";
				ti,pm-firmware = "am335x-pm-firmware.elf";
			};

			prcm: prcm@200000 {
				compatible = "ti,am3-prcm";
				reg = <0x200000 0x4000>;

				prcm_clocks: clocks {
					#address-cells = <1>;
					#size-cells = <0>;
				};

				prcm_clockdomains: clockdomains {
				};
			};

			scm: scm@210000 {
				compatible = "ti,am3-scm", "simple-bus";
				reg = <0x210000 0x2000>;
				#address-cells = <1>;
				#size-cells = <1>;
				#pinctrl-cells = <1>;
				ranges = <0 0x210000 0x2000>;

				am33xx_pinmux: pinmux@800 {
					compatible = "pinctrl-single";
					reg = <0x800 0x238>;
					#address-cells = <1>;
					#size-cells = <0>;
					#pinctrl-cells = <1>;
					pinctrl-single,register-width = <32>;
					pinctrl-single,function-mask = <0x7f>;
				};

				scm_conf: scm_conf@0 {
					compatible = "syscon", "simple-bus";
					reg = <0x0 0x800>;
					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0 0 0x800>;

					scm_clocks: clocks {
						#address-cells = <1>;
						#size-cells = <0>;
					};
				};

				wkup_m3_ipc: wkup_m3_ipc@1324 {
					compatible = "ti,am3352-wkup-m3-ipc";
					reg = <0x1324 0x24>;
					interrupts = <78>;
					ti,rproc = <&wkup_m3>;
					mboxes = <&mailbox &mbox_wkupm3>;
				};

				edma_xbar: dma-router@f90 {
					compatible = "ti,am335x-edma-crossbar";
					reg = <0xf90 0x40>;
					#dma-cells = <3>;
					dma-requests = <32>;
					dma-masters = <&edma>;
				};

				scm_clockdomains: clockdomains {
				};
			};
		};

		intc: interrupt-controller@48200000 {
			compatible = "ti,am33xx-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

		edma: edma@49000000 {
			compatible = "ti,edma3-tpcc";
			ti,hwmods = "tpcc";
			reg =	<0x49000000 0x10000>;
			reg-names = "edma3_cc";
			interrupts = <12 13 14>;
			interrupt-names = "edma3_ccint", "edma3_mperr",
					  "edma3_ccerrint";
			dma-requests = <64>;
			#dma-cells = <2>;

			ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
				   <&edma_tptc2 0>;

			ti,edma-memcpy-channels = <20 21>;
		};

		edma_tptc0: tptc@49800000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc0";
			reg =	<0x49800000 0x100000>;
			interrupts = <112>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc1: tptc@49900000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc1";
			reg =	<0x49900000 0x100000>;
			interrupts = <113>;
			interrupt-names = "edma3_tcerrint";
		};

		edma_tptc2: tptc@49a00000 {
			compatible = "ti,edma3-tptc";
			ti,hwmods = "tptc2";
			reg =	<0x49a00000 0x100000>;
			interrupts = <114>;
			interrupt-names = "edma3_tcerrint";
		};

		emif: emif@4c000000 {
			compatible = "ti,emif-am3352";
			reg =	<0x4C000000 0x1000>;
			sram = <&pm_sram_code
				&pm_sram_data>;
		};

		gpio0: gpio@44e07000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x44e07000 0x1000>;
			interrupts = <96>;
		};

		gpio1: gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
		};

		gpio2: gpio@481ac000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x481ac000 0x1000>;
			interrupts = <32>;
		};

		gpio3: gpio@481ae000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x481ae000 0x1000>;
			interrupts = <62>;
		};

		uart0: serial@44e09000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
			reg = <0x44e09000 0x2000>;
			interrupts = <72>;
			status = "disabled";			
		};

		uart1: serial@48022000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
			reg = <0x48022000 0x2000>;
			interrupts = <73>;
			status = "disabled";
			dmas = <&edma 28 0>, <&edma 29 0>;
			dma-names = "tx", "rx";
		};

		uart2: serial@48024000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
			reg = <0x48024000 0x2000>;
			interrupts = <74>;
			status = "disabled";
			dmas = <&edma 30 0>, <&edma 31 0>;
			dma-names = "tx", "rx";
		};

		uart3: serial@481a6000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart4";
			clock-frequency = <48000000>;
			reg = <0x481a6000 0x2000>;
			interrupts = <44>;
			status = "disabled";
		};

		uart4: serial@481a8000 {
			compatible = "ti,am3352-uart", "ti,omap3-uart";
			ti,hwmods = "uart5";
			clock-frequency = <48000000>;
			reg = <0x481a8000 0x2000>;
			interrupts = <45>;
			status = "disabled";
		};

		uart5: serial@481aa000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart6";
			clock-frequency = <48000000>;
			reg = <0x481aa000 0x2000>;
			interrupts = <46>;
			status = "disabled";
		};

		i2c0: i2c@44e0b000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
			reg = <0x44e0b000 0x1000>;
			interrupts = <70>;
			status = "disabled";
		};

		i2c1: i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			interrupts = <71>;
			status = "disabled";
		};

		i2c2: i2c@4819c000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
			reg = <0x4819c000 0x1000>;
			interrupts = <30>;
			status = "disabled";
		};

		mmc1: mmc@48060000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc1";
			ti,dual-volt;
			ti,needs-special-reset;
			ti,needs-special-hs-handling;
			dmas = <&edma_xbar 24 0 0
				&edma_xbar 25 0 0>;
			dma-names = "tx", "rx";
			interrupts = <64>;
			reg = <0x48060000 0x1000>;
			status = "disabled";
		};

		mmc2: mmc@481d8000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc2";
			ti,needs-special-reset;
			dmas = <&edma 2 0
				&edma 3 0>;
			dma-names = "tx", "rx";
			interrupts = <28>;
			reg = <0x481d8000 0x1000>;
			status = "disabled";
		};

		mmc3: mmc@47810000 {
			compatible = "ti,omap4-hsmmc";
			ti,hwmods = "mmc3";
			ti,needs-special-reset;
			interrupts = <29>;
			reg = <0x47810000 0x1000>;
			status = "disabled";
		};

		hwspinlock: spinlock@480ca000 {
			compatible = "ti,omap4-hwspinlock";
			reg = <0x480ca000 0x1000>;
			ti,hwmods = "spinlock";
			#hwlock-cells = <1>;
		};

		wdt2: wdt@44e35000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
			reg = <0x44e35000 0x1000>;
			interrupts = <91>;
		};

		dcan0: can@481cc000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can0";
			reg = <0x481cc000 0x2000>;
			clocks = <&dcan0_fck>;
			clock-names = "fck";
			syscon-raminit = <&scm_conf 0x644 0>;
			interrupts = <52>;
			status = "disabled";
		};

		dcan1: can@481d0000 {
			compatible = "ti,am3352-d_can";
			ti,hwmods = "d_can1";
			reg = <0x481d0000 0x2000>;
			clocks = <&dcan1_fck>;
			clock-names = "fck";
			syscon-raminit = <&scm_conf 0x644 1>;
			interrupts = <55>;
			status = "disabled";
		};

		mailbox: mailbox@480C8000 {
			compatible = "ti,omap4-mailbox";
			reg = <0x480C8000 0x200>;
			interrupts = <77>;
			ti,hwmods = "mailbox";
			#mbox-cells = <1>;
			ti,mbox-num-users = <4>;
			ti,mbox-num-fifos = <8>;
			mbox_wkupm3: wkup_m3 {
				ti,mbox-send-noirq;
				ti,mbox-tx = <0 0 0>;
				ti,mbox-rx = <0 0 3>;
			};
		};

		timer1: timer@44e31000 {
			compatible = "ti,am335x-timer-1ms";
			reg = <0x44e31000 0x400>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
			compatible = "ti,am335x-timer";
			reg = <0x48040000 0x400>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
			compatible = "ti,am335x-timer";
			reg = <0x48042000 0x400>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
			compatible = "ti,am335x-timer";
			reg = <0x48044000 0x400>;
			interrupts = <92>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
		};

		timer5: timer@48046000 {
			compatible = "ti,am335x-timer";
			reg = <0x48046000 0x400>;
			interrupts = <93>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
		};

		timer6: timer@48048000 {
			compatible = "ti,am335x-timer";
			reg = <0x48048000 0x400>;
			interrupts = <94>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
		};

		timer7: timer@4804a000 {
			compatible = "ti,am335x-timer";
			reg = <0x4804a000 0x400>;
			interrupts = <95>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
		};

		rtc: rtc@44e3e000 {
			status = "disabled";
               		ti,hwmods = "disabled";
		};

		spi0: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x48030000 0x400>;
			interrupts = <65>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi0";
			dmas = <&edma 16 0
				&edma 17 0
				&edma 18 0
				&edma 19 0>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		spi1: spi@481a0000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x481a0000 0x400>;
			interrupts = <125>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi1";
			dmas = <&edma 42 0
				&edma 43 0
				&edma 44 0
				&edma 45 0>;
			dma-names = "tx0", "rx0", "tx1", "rx1";
			status = "disabled";
		};

		usb: usb@47400000 {
			compatible = "ti,am33xx-usb";
			reg = <0x47400000 0x1000>;
			ranges;
			#address-cells = <1>;
			#size-cells = <1>;
			ti,hwmods = "usb_otg_hs";
			status = "disabled";

			usb_ctrl_mod: control@44e10620 {
				compatible = "ti,am335x-usb-ctrl-module";
				reg = <0x44e10620 0x10
					0x44e10648 0x4>;
				reg-names = "phy_ctrl", "wakeup";
				status = "disabled";
			};

			usb0_phy: usb-phy@47401300 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401300 0x100>;
				reg-names = "phy";
				status = "disabled";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb0: usb@47401000 {
				compatible = "ti,musb-am33xx";
				status = "disabled";
				reg = <0x47401400 0x400
					0x47401000 0x200>;
				reg-names = "mc", "control";

				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb0_phy>;

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			usb1_phy: usb-phy@47401b00 {
				compatible = "ti,am335x-usb-phy";
				reg = <0x47401b00 0x100>;
				reg-names = "phy";
				status = "disabled";
				ti,ctrl_mod = <&usb_ctrl_mod>;
			};

			usb1: usb@47401800 {
				compatible = "ti,musb-am33xx";
				status = "disabled";
				reg = <0x47401c00 0x400
					0x47401800 0x200>;
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb1_phy>;

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
			};

			cppi41dma: dma-controller@47402000 {
				compatible = "ti,am3359-cppi41";
				reg =  <0x47400000 0x1000
					0x47402000 0x1000
					0x47403000 0x1000
					0x47404000 0x4000>;
				reg-names = "glue", "controller", "scheduler", "queuemgr";
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
				status = "disabled";
			};
		};

		epwmss0: epwmss@48300000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48300000 0x10>;
			ti,hwmods = "epwmss0";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48300100 0x48300100 0x80   /* ECAP */
				  0x48300180 0x48300180 0x80   /* EQEP */
				  0x48300200 0x48300200 0x80>; /* EHRPWM */

			ecap0: ecap@48300100 {
				compatible = "ti,am3352-ecap",
					     "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48300100 0x80>;
				clocks = <&l4ls_gclk>;
				clock-names = "fck";
				interrupts = <31>;
				interrupt-names = "ecap0";
				status = "disabled";
			};

			ehrpwm0: pwm@48300200 {
				compatible = "ti,am3352-ehrpwm",
					     "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48300200 0x80>;
				clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};
		};

		epwmss1: epwmss@48302000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48302000 0x10>;
			ti,hwmods = "epwmss1";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48302100 0x48302100 0x80   /* ECAP */
				  0x48302180 0x48302180 0x80   /* EQEP */
				  0x48302200 0x48302200 0x80>; /* EHRPWM */

			ecap1: ecap@48302100 {
				compatible = "ti,am3352-ecap",
					     "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48302100 0x80>;
				clocks = <&l4ls_gclk>;
				clock-names = "fck";
				interrupts = <47>;
				interrupt-names = "ecap1";
				status = "disabled";
			};

			ehrpwm1: pwm@48302200 {
				compatible = "ti,am3352-ehrpwm",
					     "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48302200 0x80>;
				clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};
		};

		epwmss2: epwmss@48304000 {
			compatible = "ti,am33xx-pwmss";
			reg = <0x48304000 0x10>;
			ti,hwmods = "epwmss2";
			#address-cells = <1>;
			#size-cells = <1>;
			status = "disabled";
			ranges = <0x48304100 0x48304100 0x80   /* ECAP */
				  0x48304180 0x48304180 0x80   /* EQEP */
				  0x48304200 0x48304200 0x80>; /* EHRPWM */

			ecap2: ecap@48304100 {
				compatible = "ti,am3352-ecap",
					     "ti,am33xx-ecap";
				#pwm-cells = <3>;
				reg = <0x48304100 0x80>;
				clocks = <&l4ls_gclk>;
				clock-names = "fck";
				interrupts = <61>;
				interrupt-names = "ecap2";
				status = "disabled";
			};

			ehrpwm2: pwm@48304200 {
				compatible = "ti,am3352-ehrpwm",
					     "ti,am33xx-ehrpwm";
				#pwm-cells = <3>;
				reg = <0x48304200 0x80>;
				clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
				clock-names = "tbclk", "fck";
				status = "disabled";
			};
		};

		mac: ethernet@4a100000 {
			compatible = "ti,am335x-cpsw","ti,cpsw";
			ti,hwmods = "cpgmac0";
			clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
			clock-names = "fck", "cpts";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			mac_control = <0x20>;
			slaves = <2>;
			active_slave = <0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <29>;
			reg = <0x4a100000 0x800
			       0x4a101200 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			/*
			 * c0_rx_thresh_pend
			 * c0_rx_pend
			 * c0_tx_pend
			 * c0_misc_pend
			 */
			interrupts = <40 41 42 43>;
			ranges;
			syscon = <&scm_conf>;
			status = "disabled";

			davinci_mdio: mdio@4a101000 {
				compatible = "ti,cpsw-mdio","ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <1000000>;
				reg = <0x4a101000 0x100>;
				status = "disabled";
			};

			cpsw_emac0: slave@4a100200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@4a100300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			phy_sel: cpsw-phy-sel@44e10650 {
				compatible = "ti,am3352-cpsw-phy-sel";
				reg= <0x44e10650 0x4>;
				reg-names = "gmii-sel";
			};
		};

		ocmcram: ocmcram@40300000 {
			compatible = "mmio-sram";
			reg = <0x40300000 0x10000>; /* 64k */
			ranges = <0x0 0x40300000 0x10000>;
			#address-cells = <1>;
			#size-cells = <1>;

			pm_sram_code: pm-sram-code@0 {
				compatible = "ti,sram";
				reg = <0x0 0x1000>;
				protect-exec;
			};

			pm_sram_data: pm-sram-data@1000 {
				compatible = "ti,sram";
				reg = <0x1000 0x1000>;
				pool;
			};
		};

		pruss_soc_bus: pruss_soc_bus@4a326004 {
			compatible = "ti,am3356-pruss-soc-bus";
			reg = <0x4a326004 0x4>;
			ti,hwmods = "pruss";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x4a300000 0x80000>;
			status = "disabled";

			pruss: pruss@0 {
				compatible = "ti,am3356-pruss";
				reg = <0x0 0x80000>;
				interrupts = <20 21 22 23 24 25 26 27>;
				interrupt-names = "host2", "host3", "host4",
						  "host5", "host6", "host7",
						  "host8", "host9";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges;
				status = "disabled";

				pruss_mem: memories@0 {
					reg = <0x0 0x2000>,
					      <0x2000 0x2000>,
					      <0x10000 0x3000>,
					      <0x2e000 0x31c>;
					reg-names = "dram0", "dram1",
						    "shrdram2", "iep";
				};

				pruss_cfg: cfg@26000 {
					compatible = "syscon";
					reg = <0x26000 0x2000>;
				};

				pruss_mii_rt: mii_rt@32000 {
					compatible = "syscon";
					reg = <0x32000 0x58>;
				};

				pruss_intc: intc@20000 {
					compatible = "ti,am3356-pruss-intc";
					reg = <0x20000 0x2000>;
					reg-names = "intc";
					interrupt-controller;
					#interrupt-cells = <1>;
				};

				pru0: pru@34000 {
					compatible = "ti,am3356-pru";
					reg = <0x34000 0x2000>,
					      <0x22000 0x400>,
					      <0x22400 0x100>;
					reg-names = "iram", "control", "debug";
					firmware-name = "am335x-pru0-fw";
					interrupt-parent = <&pruss_intc>;
					interrupts = <16>, <17>;
					interrupt-names = "vring", "kick";
				};

				pru1: pru@38000 {
					compatible = "ti,am3356-pru";
					reg = <0x38000 0x2000>,
					      <0x24000 0x400>,
					      <0x24400 0x100>;
					reg-names = "iram", "control", "debug";
					firmware-name = "am335x-pru1-fw";
					interrupt-parent = <&pruss_intc>;
					interrupts = <18>, <19>;
					interrupt-names = "vring", "kick";
				};

				pruss_mdio: mdio@32400 {
					compatible = "ti,davinci_mdio";
					reg = <0x32400 0x90>;
					clocks = <&dpll_core_m4_ck>;
					clock-names = "fck";
					bus_freq = <1000000>;
					#address-cells = <1>;
					#size-cells = <0>;
					status = "disabled";
				};
			};
		};

		elm: elm@48080000 {
			compatible = "ti,am3352-elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
			ti,hwmods = "elm";
			status = "disabled";
		};

		lcdc: lcdc@4830e000 {
			compatible = "ti,am33xx-tilcdc";
			reg = <0x4830e000 0x1000>;
			interrupts = <36>;
			ti,hwmods = "lcdc";
			status = "disabled";
		};

		tscadc: tscadc@44e0d000 {
			compatible = "ti,am3359-tscadc";
			reg = <0x44e0d000 0x1000>;
			interrupts = <16>;
			ti,hwmods = "adc_tsc";
			status = "disabled";
			dmas = <&edma 53 0>, <&edma 57 0>;
			dma-names = "fifo0", "fifo1";

			tsc {
				compatible = "ti,am3359-tsc";
			};
			am335x_adc: adc {
				#io-channel-cells = <1>;
				compatible = "ti,am3359-adc";
			};
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			ti,no-idle-on-init;
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
			dmas = <&edma 52 0>;
			dma-names = "rxtx";
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
			#address-cells = <2>;
			#size-cells = <1>;
			interrupt-controller;
			#interrupt-cells = <2>;
			gpio-controller;
			#gpio-cells = <2>;
			status = "disabled";
		};

		sham: sham@53100000 {
			compatible = "ti,omap4-sham";
			ti,hwmods = "sham";
			reg = <0x53100000 0x200>;
			interrupts = <109>;
			dmas = <&edma 36 0>;
			dma-names = "rx";
		};

		aes: aes@53500000 {
			compatible = "ti,omap4-aes";
			ti,hwmods = "aes";
			reg = <0x53500000 0xa0>;
			interrupts = <103>;
			dmas = <&edma 6 0>,
			       <&edma 5 0>;
			dma-names = "tx", "rx";
		};

		mcasp0: mcasp@48038000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp0";
			reg = <0x48038000 0x2000>,
			      <0x46000000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <80>, <81>;
			interrupt-names = "tx", "rx";
			status = "disabled";
			dmas = <&edma 8 2>,
				<&edma 9 2>;
			dma-names = "tx", "rx";
		};

		mcasp1: mcasp@4803C000 {
			compatible = "ti,am33xx-mcasp-audio";
			ti,hwmods = "mcasp1";
			reg = <0x4803C000 0x2000>,
			      <0x46400000 0x400000>;
			reg-names = "mpu", "dat";
			interrupts = <82>, <83>;
			interrupt-names = "tx", "rx";
			status = "disabled";
			dmas = <&edma 10 2>,
				<&edma 11 2>;
			dma-names = "tx", "rx";
		};

		rng: rng@48310000 {
			compatible = "ti,omap4-rng";
			ti,hwmods = "rng";
			reg = <0x48310000 0x2000>;
			interrupts = <111>;
		};

		/*
		 * The SGX is disabled by default because it is an optional
		 * module and only some AM335x variants contain this module,
		 * such as AM3358 and AM3357. The status should be overwritten
		 * as "OK" at the corresponding board.dts.
		 */
		sgx: sgx@56000000 {
			compatible = "ti,am3352-sgx530", "img,sgx530";
			ti,hwmods = "gfx";
			reg = <0x56000000 0x10000>;
			interrupts = <37>;
			clocks = <&gfx_fck_div_ck>;
			clock-names = "fclk";
			status = "disabled";
		};
	};
};

/include/ "am33xx-clocks.dtsi"

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/net/ti-dp83869.h>

/ {
	model = "SYNC 2000-M5";
	compatible = "ti,am335x-evm", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};

};

&am33xx_pinmux {
	pinctrl-names = "default";
	
	pinctrl-0 = <&gpio0_pins &gpio1_pins &gpio2_pins &gpio3_pins>;
	
	gpio0_pins: pinmux_gpio0_pins { 
		pinctrl-single,pins = <
			0x2C (PIN_OUTPUT | MUX_MODE7) /* gpio0_27 *//*Com2 uart0 232 enable*/
			0x28 (PIN_OUTPUT | MUX_MODE7) /* GPIO0_26 watchdog pulse */
			
		>;
	};

	gpio1_pins: pinmux_gpio1_pins { 
		pinctrl-single,pins = <
			0x30  (PIN_OUTPUT | MUX_MODE7) /* gpio1_12 *//*Com3 uart3 232 enable*/
			0x34  (PIN_OUTPUT | MUX_MODE7) /* gpio1_13 */ /*Com4 uart5 232 enable*/
			0x78  (PIN_OUTPUT | MUX_MODE7) /* gpio1_28,conf_gpmc_ben1,DO_buffer enable */
			0x84  (PIN_OUTPUT | MUX_MODE7) /* gpio1_31,conf_gpmc_csn2 */ /*gprs power shutdown */
		>;
	};

	gpio2_pins: pinmux_gpio2_pins { 
		pinctrl-single,pins = <
			0x8C  (PIN_INPUT_PULLUP | MUX_MODE7)    /* gpio2_1 usb over current from external source*/  
			0xE4  (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpio2_23 */  
			0xEC  (PIN_OUTPUT_PULLUP | MUX_MODE7) 	/* GPIO2_25 ,conf_lcd_ac_bias_en,health status */
		>;
	};

	gpio3_pins: pinmux_gpio3_pins { 
		pinctrl-single,pins = <
			0x1A0  (PIN_OUTPUT | MUX_MODE7) /* gpio3_18 */
			0x1A8  (PIN_OUTPUT | MUX_MODE7) /* gpio3_20,conf_mcasp0 */ /*gprs hard shutdown */
			0x234  (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpio3_13,conf_usb1_drvvbu,DO_Buff */
			0x1A0  (PIN_OUTPUT | MUX_MODE7) /* GPIO3_18,conf_mcasp0_aclkr,profibus */
			0x198  (PIN_INPUT  | MUX_MODE7) /* GPIO3_16,conf_mcasp0_axr0,debug */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d1.i2c1_sda */
			AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_cs0.i2c1_scl */
		>;
	};
	
	i2c2_pins: pinmux_i2c2_pins {
			pinctrl-single,pins = <
				0x150 (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_sclk.i2c0_sda */
				0x154 (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d0.i2c0_scl */
			>;
		};
	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x168 (PIN_INPUT | MUX_MODE0)		/* uart0_ctsn.uart0_ctsn */
			0x16C (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* uart0_rtsn .uart0_rtsn  */
			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT | MUX_MODE0)		/* uart1_ctsn.uart1_ctsn */
			0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */  
			0xFC (PIN_INPUT | MUX_MODE4)		/* mmc0_dat0.uart1_ri */
			0xF8 (PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* mmc0_dat0.uart1_dtr */
			0xF4 (PIN_INPUT | MUX_MODE4)		/* mmc0_dat0.uart1_dsr */
			0xF0 (PIN_INPUT | MUX_MODE4)		/* mmc0_dat0.uart1_dcd */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			0x164 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* ecap0_in_pwm0_out.UART3_TXD */
			0x160 (PIN_INPUT_PULLUP | MUX_MODE1)	/* spi0_cs1.UART3_RXD */
			0xCC (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* LCD_DATA11.UART3_RTSN */
			0xC8 (PIN_INPUT | MUX_MODE6)		/* LCD_DATA10.UART3_CTSN */
		>;
	};
	uart5_pins: pinmux_uart5_pins {
		pinctrl-single,pins = <
			0xD8 (PIN_INPUT | MUX_MODE6)		/* lcd_data14.uart5_ctsn */
			0xC4 (PIN_INPUT_PULLUP | MUX_MODE4)	/* lcd_data9.uart5_rxd */
			0xC0 (PIN_OUTPUT_PULLDOWN | MUX_MODE4)  /* lcd_data8.uart5_txd */			
			0xDC (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* lcd_data15.uart5_rtsn */
		>;
	};

	nandflash_pins_s0: nandflash_pins_s0 {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
			AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
		>;
	};

	ecap0_pins: backlight_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x964, MUX_MODE0)	/* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */

			/* Slave 2 */
			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
			0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value*/
			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)		/* spi0_cs1.gpio0_6 */
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4)		/* mcasp0_aclkr.mmc0_sdwp */
		>;
	};

	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
		>;
	};

	mcasp1_pins: mcasp1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
			AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
		>;
	};

	mcasp1_pins_sleep: mcasp1_pins_sleep {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	dcan1_pins_default: dcan1_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
			AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
		>;
	};
	
};

&usb {
	status = "okay";
};

&usb_ctrl_mod {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
	disable-over-current;
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
	rts-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <2 1>;
	linux,rs485-enabled-at-boot-time;
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	status = "okay";
	rts-gpio = <&gpio2 17 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <2 1>;
	linux,rs485-enabled-at-boot-time;			
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart5_pins>;
	status = "okay";
	rts-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <2 1>;
	linux,rs485-enabled-at-boot-time;			
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	/* Set OPP50 (0.95V) for VDD core */
	sleep-sequence = /bits/ 8 <
		0x02 0x2d 0x25 0x1f /* Set VDD2 to 0.95V */
	>;

	/* Set OPP100 (1.10V) for VDD core */
	wake-sequence = /bits/ 8 <
		0x02 0x2d 0x25 0x2b /* Set VDD2 to 1.1V */
	>;

	tps: tps@2d {
		reg = <0x2d>;
	};
	rtc@68 {
		compatible = "dallas,ds1388";
		reg = <0x68>;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <100000>;

	/* Set OPP50 (0.95V) for VDD core */
	sleep-sequence = /bits/ 8 <
		0x02 0x2d 0x25 0x1f /* Set VDD2 to 0.95V */
	>;
	
	/* Set OPP100 (1.10V) for VDD core */
	wake-sequence = /bits/ 8 <
		0x02 0x2d 0x25 0x2b /* Set VDD2 to 1.1V */
	>;
};

&i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
};

&gpio0 {
	/*ti,no-reset-on-init;*/
	status = "okay";
	pinctrl-names = "default";
};
&gpio1 {
	
	ti,no-reset-on-init;
	status = "okay";
	pinctrl-names = "default";
};

&gpio2 {
	ti,no-reset-on-init;
	status = "okay";
	pinctrl-names = "default";
};

&gpio3 {
	status = "okay";
	pinctrl-names = "default";
	ti,no-reset-on-init;
};

&elm {
	status = "okay";
};

&gpmc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins_s0>;
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		ti,nand-xfer-type = "prefetch-dma";
		ti,nand-ecc-opt = "bch8";
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		/* MTD partition table */
		/* All SPL-* partitions are sized to minimal length
		 * which can be independently programmable. For
		 * NAND flash this is equal to size of erase-block */
		#address-cells = <1>;
		#size-cells = <1>;
		partition@0 {
			label = "NAND.SPL";
			reg = <0x00000000 0x00020000>;
		};
		partition@1 {
			label = "NAND.SPL.backup1";
			reg = <0x00020000 0x00020000>;
		};
		partition@2 {
			label = "NAND.SPL.backup2";
			reg = <0x00040000 0x00020000>;
		};
		partition@3 {
			label = "NAND.SPL.backup3";
			reg = <0x00060000 0x00020000>;
		};
		partition@4 {
			label = "NAND.u-boot";
			reg = <0x00080000 0x00100000>;
		};
		partition@5 {
			label = "NAND.u-boot-env1";
			reg = <0x00180000 0x00020000>;
		};
		partition@6 {
			label = "NAND.u-boot-env2";
			reg = <0x001A0000 0x00020000>;
		};
		partition@7 {
			label = "NAND.RBlob";
			reg = <0x001c0000 0x0fe40000>;
		};
	};
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		
		vrtc_reg: regulator@0 {
			
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
	
	dp83869_0: ethernet-phy@10 {
		reg = <10>;
		tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
		rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
		ti,op-mode = <DP83869_RGMII_100_BASE>;
		ti,max-output-impedance = "true";
		ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
		rx-internal-delay-ps = <2000>;
		tx-internal-delay-ps = <2000>;
	};

	dp83869_1: ethernet-phy@11 {
		reg = <11>;
		tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
		rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
		ti,op-mode = <DP83869_RGMII_100_BASE>;
		ti,max-output-impedance = "true";
		ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
		rx-internal-delay-ps = <2000>;
		tx-internal-delay-ps = <2000>;
	};	
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <2>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <3>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;	
};

&dcan1 {
	status = "disabled";	/* Enable only if Profile 1 is selected */
	pinctrl-names = "default";
	pinctrl-0 = <&dcan1_pins_default>;
};

/*
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/net/ti-dp83869.h>

/ {
	model = "SYNC 2000-M5";
	compatible = "ti,am335x-evm", "ti,am33xx";

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x10000000>; /* 256 MB */
	};

	vbat: fixedregulator0 {
		compatible = "regulator-fixed";
		regulator-name = "vbat";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-boot-on;
	};

	lis3_reg: fixedregulator1 {
		compatible = "regulator-fixed";
		regulator-name = "lis3_reg";
		regulator-boot-on;
	};

};

&am33xx_pinmux {
	pinctrl-names = "default";
	
	pinctrl-0 = <&gpio0_pins &gpio1_pins &gpio2_pins &gpio3_pins>;
	
	gpio0_pins: pinmux_gpio0_pins { 
		pinctrl-single,pins = <
			0x2C (PIN_OUTPUT | MUX_MODE7) /* gpio0_27 *//*Com2 uart0 232 enable*/
			0x28 (PIN_OUTPUT | MUX_MODE7) /* GPIO0_26 watchdog pulse */
			
		>;
	};

	gpio1_pins: pinmux_gpio1_pins { 
		pinctrl-single,pins = <
			0x30  (PIN_OUTPUT | MUX_MODE7) /* gpio1_12 *//*Com3 uart3 232 enable*/
			0x34  (PIN_OUTPUT | MUX_MODE7) /* gpio1_13 */ /*Com4 uart5 232 enable*/
			0x78  (PIN_OUTPUT | MUX_MODE7) /* gpio1_28,conf_gpmc_ben1,DO_buffer enable */
			0x84  (PIN_OUTPUT | MUX_MODE7) /* gpio1_31,conf_gpmc_csn2 */ /*gprs power shutdown */
		>;
	};

	gpio2_pins: pinmux_gpio2_pins { 
		pinctrl-single,pins = <
			0x8C  (PIN_INPUT_PULLUP | MUX_MODE7)    /* gpio2_1 usb over current from external source*/  
			0xE4  (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpio2_23 */  
			0xEC  (PIN_OUTPUT_PULLUP | MUX_MODE7) 	/* GPIO2_25 ,conf_lcd_ac_bias_en,health status */
		>;
	};

	gpio3_pins: pinmux_gpio3_pins { 
		pinctrl-single,pins = <
			0x1A0  (PIN_OUTPUT | MUX_MODE7) /* gpio3_18 */
			0x1A8  (PIN_OUTPUT | MUX_MODE7) /* gpio3_20,conf_mcasp0 */ /*gprs hard shutdown */
			0x234  (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpio3_13,conf_usb1_drvvbu,DO_Buff */
			0x1A0  (PIN_OUTPUT | MUX_MODE7) /* GPIO3_18,conf_mcasp0_aclkr,profibus */
			0x198  (PIN_INPUT  | MUX_MODE7) /* GPIO3_16,conf_mcasp0_axr0,debug */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
		>;
	};

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d1.i2c1_sda */
			AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_cs0.i2c1_scl */
		>;
	};
	
	i2c2_pins: pinmux_i2c2_pins {
			pinctrl-single,pins = <
				0x150 (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_sclk.i2c0_sda */
				0x154 (PIN_INPUT_PULLUP | MUX_MODE2)	/* spi0_d0.i2c0_scl */
			>;
		};
	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			0x168 (PIN_INPUT | MUX_MODE0)		/* uart0_ctsn.uart0_ctsn */
			0x16C (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* uart0_rtsn .uart0_rtsn  */
			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
		>;
	};
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			0x178 (PIN_INPUT | MUX_MODE0)		/* uart1_ctsn.uart1_ctsn */
			0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_rtsn.uart1_rtsn */
			0x180 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart1_rxd.uart1_rxd */
			0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart1_txd.uart1_txd */  
			0xFC (PIN_INPUT | MUX_MODE4)		/* mmc0_dat0.uart1_ri */
			0xF8 (PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* mmc0_dat0.uart1_dtr */
			0xF4 (PIN_INPUT | MUX_MODE4)		/* mmc0_dat0.uart1_dsr */
			0xF0 (PIN_INPUT | MUX_MODE4)		/* mmc0_dat0.uart1_dcd */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			0x164 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)	/* ecap0_in_pwm0_out.UART3_TXD */
			0x160 (PIN_INPUT_PULLUP | MUX_MODE1)	/* spi0_cs1.UART3_RXD */
			0xCC (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* LCD_DATA11.UART3_RTSN */
			0xC8 (PIN_INPUT | MUX_MODE6)		/* LCD_DATA10.UART3_CTSN */
		>;
	};
	uart5_pins: pinmux_uart5_pins {
		pinctrl-single,pins = <
			0xD8 (PIN_INPUT | MUX_MODE6)		/* lcd_data14.uart5_ctsn */
			0xC4 (PIN_INPUT_PULLUP | MUX_MODE4)	/* lcd_data9.uart5_rxd */
			0xC0 (PIN_OUTPUT_PULLDOWN | MUX_MODE4)  /* lcd_data8.uart5_txd */			
			0xDC (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* lcd_data15.uart5_rtsn */
		>;
	};

	nandflash_pins_s0: nandflash_pins_s0 {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
			AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
			AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
			AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
			AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
			AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
			AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
			AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
		>;
	};

	ecap0_pins: backlight_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x964, MUX_MODE0)	/* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
			0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */

			/* Slave 2 */
			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
			0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
			0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
		>;
	};

	cpsw_sleep: cpsw_sleep {
		pinctrl-single,pins = <
			/* Slave 1 reset value */
			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)

			/* Slave 2 reset value*/
			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
		>;
	};

	davinci_mdio_sleep: davinci_mdio_sleep {
		pinctrl-single,pins = <
			/* MDIO reset value */
			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)		/* spi0_cs1.gpio0_6 */
			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat0.mmc0_dat0 */
			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat1.mmc0_dat1 */
			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat2.mmc0_dat2 */
			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_dat3.mmc0_dat3 */
			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_cmd.mmc0_cmd */
			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)	/* mmc0_clk.mmc0_clk */
			AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4)		/* mcasp0_aclkr.mmc0_sdwp */
		>;
	};

	mmc3_pins: pinmux_mmc3_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
			AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
		>;
	};

	mcasp1_pins: mcasp1_pins {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
			AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
		>;
	};

	mcasp1_pins_sleep: mcasp1_pins_sleep {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
		>;
	};

	dcan1_pins_default: dcan1_pins_default {
		pinctrl-single,pins = <
			AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
			AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
		>;
	};
	
};

&usb {
	status = "okay";
};

&usb_ctrl_mod {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb0 {
	status = "okay";
	disable-over-current;
};

&usb1 {
	status = "okay";
	dr_mode = "host";
};

&uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
	status = "okay";
	rts-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <2 1>;
	linux,rs485-enabled-at-boot-time;
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	status = "okay";
	rts-gpio = <&gpio2 17 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <2 1>;
	linux,rs485-enabled-at-boot-time;			
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart5_pins>;
	status = "okay";
	rts-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <2 1>;
	linux,rs485-enabled-at-boot-time;			
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	/* Set OPP50 (0.95V) for VDD core */
	sleep-sequence = /bits/ 8 <
		0x02 0x2d 0x25 0x1f /* Set VDD2 to 0.95V */
	>;

	/* Set OPP100 (1.10V) for VDD core */
	wake-sequence = /bits/ 8 <
		0x02 0x2d 0x25 0x2b /* Set VDD2 to 1.1V */
	>;

	tps: tps@2d {
		reg = <0x2d>;
	};
	rtc@68 {
		compatible = "dallas,ds1388";
		reg = <0x68>;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <100000>;

	/* Set OPP50 (0.95V) for VDD core */
	sleep-sequence = /bits/ 8 <
		0x02 0x2d 0x25 0x1f /* Set VDD2 to 0.95V */
	>;
	
	/* Set OPP100 (1.10V) for VDD core */
	wake-sequence = /bits/ 8 <
		0x02 0x2d 0x25 0x2b /* Set VDD2 to 1.1V */
	>;
};

&i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
};

&gpio0 {
	/*ti,no-reset-on-init;*/
	status = "okay";
	pinctrl-names = "default";
};
&gpio1 {
	
	ti,no-reset-on-init;
	status = "okay";
	pinctrl-names = "default";
};

&gpio2 {
	ti,no-reset-on-init;
	status = "okay";
	pinctrl-names = "default";
};

&gpio3 {
	status = "okay";
	pinctrl-names = "default";
	ti,no-reset-on-init;
};

&elm {
	status = "okay";
};

&gpmc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&nandflash_pins_s0>;
	ranges = <0 0 0x08000000 0x1000000>;	/* CS0: 16MB for NAND */
	nand@0,0 {
		compatible = "ti,omap2-nand";
		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
		interrupt-parent = <&gpmc>;
		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
			     <1 IRQ_TYPE_NONE>;	/* termcount */
		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
		ti,nand-xfer-type = "prefetch-dma";
		ti,nand-ecc-opt = "bch8";
		ti,elm-id = <&elm>;
		nand-bus-width = <8>;
		gpmc,device-width = <1>;
		gpmc,sync-clk-ps = <0>;
		gpmc,cs-on-ns = <0>;
		gpmc,cs-rd-off-ns = <44>;
		gpmc,cs-wr-off-ns = <44>;
		gpmc,adv-on-ns = <6>;
		gpmc,adv-rd-off-ns = <34>;
		gpmc,adv-wr-off-ns = <44>;
		gpmc,we-on-ns = <0>;
		gpmc,we-off-ns = <40>;
		gpmc,oe-on-ns = <0>;
		gpmc,oe-off-ns = <54>;
		gpmc,access-ns = <64>;
		gpmc,rd-cycle-ns = <82>;
		gpmc,wr-cycle-ns = <82>;
		gpmc,bus-turnaround-ns = <0>;
		gpmc,cycle2cycle-delay-ns = <0>;
		gpmc,clk-activation-ns = <0>;
		gpmc,wr-access-ns = <40>;
		gpmc,wr-data-mux-bus-ns = <0>;
		/* MTD partition table */
		/* All SPL-* partitions are sized to minimal length
		 * which can be independently programmable. For
		 * NAND flash this is equal to size of erase-block */
		#address-cells = <1>;
		#size-cells = <1>;
		partition@0 {
			label = "NAND.SPL";
			reg = <0x00000000 0x00020000>;
		};
		partition@1 {
			label = "NAND.SPL.backup1";
			reg = <0x00020000 0x00020000>;
		};
		partition@2 {
			label = "NAND.SPL.backup2";
			reg = <0x00040000 0x00020000>;
		};
		partition@3 {
			label = "NAND.SPL.backup3";
			reg = <0x00060000 0x00020000>;
		};
		partition@4 {
			label = "NAND.u-boot";
			reg = <0x00080000 0x00100000>;
		};
		partition@5 {
			label = "NAND.u-boot-env1";
			reg = <0x00180000 0x00020000>;
		};
		partition@6 {
			label = "NAND.u-boot-env2";
			reg = <0x001A0000 0x00020000>;
		};
		partition@7 {
			label = "NAND.RBlob";
			reg = <0x001c0000 0x0fe40000>;
		};
	};
};

#include "tps65910.dtsi"

&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		
		vrtc_reg: regulator@0 {
			
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1351500>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <912500>;
			regulator-max-microvolt = <1150000>;
			regulator-boot-on;
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

&mac {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cpsw_default>;
	pinctrl-1 = <&cpsw_sleep>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&davinci_mdio_default>;
	pinctrl-1 = <&davinci_mdio_sleep>;
	status = "okay";
	
	dp83869_0: ethernet-phy@10 {
		reg = <10>;
		tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
		rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
		ti,op-mode = <DP83869_RGMII_100_BASE>;
		ti,max-output-impedance = "true";
		ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
		rx-internal-delay-ps = <2000>;
		tx-internal-delay-ps = <2000>;
	};

	dp83869_1: ethernet-phy@11 {
		reg = <11>;
		tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
		rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
		ti,op-mode = <DP83869_RGMII_100_BASE>;
		ti,max-output-impedance = "true";
		ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
		rx-internal-delay-ps = <2000>;
		tx-internal-delay-ps = <2000>;
	};	
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <10>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <11>;
	phy-mode = "rgmii-txid";
	dual_emac_res_vlan = <2>;	
};

&dcan1 {
	status = "disabled";	/* Enable only if Profile 1 is selected */
	pinctrl-names = "default";
	pinctrl-0 = <&dcan1_pins_default>;
};

   Using 'conf@am335x-evm.dtb' configuration
   Trying 'fdt@am335x-evm.dtb' fdt subimage
     Description:  Flattened Device Tree blob
     Created:      2021-11-15   9:24:00 UTC
     Type:         Flat Device Tree
     Compression:  uncompressed
     Data Start:   0x823aa414
     Data Size:    37683 Bytes = 36.8 KiB
     Architecture: ARM
     Hash algo:    sha1
     Hash value:   87b0255ab1e82f5378b55d22a069ed56d01cbf43
   Verifying Hash Integrity ... sha1+ OK
   Booting using the fdt blob at 0x823aa414
   Loading Kernel Image ... OK
   Loading Device Tree to 8bf15000, end 8bf21332 ... OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.14.67-gd315a9bb00 (root@RND-UbuntuV14) (gcc versi
on 7.3.0 (GCC)) #17 PREEMPT Mon Nov 15 12:29:52 IST 2021
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instructio
n cache
[    0.000000] OF: fdt: Machine model: SYNC 2000-M5
[    0.000000] Memory policy: Data cache writeback
[    0.000000] efi: Getting EFI parameters from FDT:
[    0.000000] efi: UEFI not found.
[    0.000000] cma: Reserved 48 MiB at 0x8d000000
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (neon)
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 64960
[    0.000000] Kernel command line: console=ttyO0,115200n8 resetDefault=no root=
ubi0:BANK1_ROOTFS rw rootfstype=ubifs ubi.mtd=7,2048
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Memory: 197272K/262144K available (8192K kernel code, 319K rwdata
, 2476K rodata, 1024K init, 275K bss, 15720K reserved, 49152K cma-reserved, 0K h
ighmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector  : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xd0800000 - 0xff800000   ( 752 MB)
[    0.000000]     lowmem  : 0xc0000000 - 0xd0000000   ( 256 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   (  14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc0900000   (9184 kB)
[    0.000000]       .init : 0xc0c00000 - 0xc0d00000   (1024 kB)
[    0.000000]       .data : 0xc0d00000 - 0xc0d4fc08   ( 320 kB)
[    0.000000]        .bss : 0xc0d4fc08 - 0xc0d949a4   ( 276 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] Preemptible hierarchical RCU implementation.
[    0.000000]  Tasks RCU enabled.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrup
ts
[    0.000000] OMAP clockevent source: timer2 at 24000000 Hz
[    0.000019] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478
484971ns
[    0.000047] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max
_idle_ns: 79635851949 ns
[    0.000061] OMAP clocksource: timer1 at 24000000 Hz
[    0.000283] timer_probe: no matching timers found
[    0.000546] Console: colour dummy device 80x30
[    0.000581] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
[    0.000591] This ensures that you still see kernel messages. Please
[    0.000600] update your kernel commandline.
[    0.000638] Calibrating delay loop... 597.60 BogoMIPS (lpj=2988032)
[    0.118781] pid_max: default: 32768 minimum: 301
[    0.119031] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.119052] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.120044] CPU: Testing write buffer coherency: ok
[    0.120973] Setting up static identity map for 0x80100000 - 0x80100060
[    0.121176] Hierarchical SRCU implementation.
[    0.121605] EFI services will not be available.
[    0.123400] devtmpfs: initialized
[    0.134228] random: get_random_u32 called from bucket_table_alloc+0x8c/0x1ac
with crng_init=0
[    0.134837] VFP support v0.3: implementor 41 architecture 3 part 30 variant c
 rev 3
[    0.135210] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, ma
x_idle_ns: 19112604462750000 ns
[    0.135241] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.140061] pinctrl core: initialized pinctrl subsystem
[    0.141000] DMI not present or invalid.
[    0.141497] NET: Registered protocol family 16
[    0.144415] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.149585] omap_hwmod: rtc: no dt node
[    0.149608] ------------[ cut here ]------------
[    0.149653] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_hwmod.c:2494 _
init.constprop.20+0x1e0/0x4a4
[    0.149666] omap_hwmod: rtc: doesn't have mpu register target base
[    0.149676] Modules linked in:
[    0.149701] CPU: 0 PID: 1 Comm: swapper Not tainted 4.14.67-gd315a9bb00 #17
[    0.149712] Hardware name: Generic AM33XX (Flattened Device Tree)
[    0.149722] Backtrace:
[    0.149766] [<c010bcac>] (dump_backtrace) from [<c010bf90>] (show_stack+0x18/
0x1c)
[    0.149784]  r7:00000009 r6:00000000 r5:c0a9b60c r4:cc03fe28
[    0.149818] [<c010bf78>] (show_stack) from [<c082bb04>] (dump_stack+0x24/0x28
)
[    0.149845] [<c082bae0>] (dump_stack) from [<c0128d24>] (__warn+0xe8/0x100)
[    0.149864] [<c0128c3c>] (__warn) from [<c0128d7c>] (warn_slowpath_fmt+0x40/0
x48)
[    0.149882]  r9:c0d4fc40 r8:c0c3b820 r7:00000000 r6:c0d0ae84 r5:00000000 r4:c
0a9b8c0
[    0.149901] [<c0128d40>] (warn_slowpath_fmt) from [<c0c0ac38>] (_init.constpr
op.20+0x1e0/0x4a4)
[    0.149913]  r3:c0ad2780 r2:c0a9b8c0
[    0.149923]  r4:c0d0ae40
[    0.149941] [<c0c0aa58>] (_init.constprop.20) from [<c0c0b428>] (__omap_hwmod
_setup_all+0x48/0x108)
[    0.149959]  r9:c0d4fc40 r8:c0c3b820 r7:c0d4fc40 r6:ffffe000 r5:c0d07ee0 r4:c
0d0ae40
[    0.149978] [<c0c0b3e0>] (__omap_hwmod_setup_all) from [<c010196c>] (do_one_i
nitcall+0x4c/0x170)
[    0.149990]  r5:c0c0b3e0 r4:00000000
[    0.150018] [<c0101920>] (do_one_initcall) from [<c0c00eac>] (kernel_init_fre
eable+0x144/0x1dc)
[    0.150035]  r8:c0c3b820 r7:c0d4fc40 r6:00000003 r5:c0c4c334 r4:c0b69658
[    0.150057] [<c0c00d68>] (kernel_init_freeable) from [<c0840710>] (kernel_ini
t+0x10/0x11c)
[    0.150074]  r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:
c0840700
[    0.150084]  r4:00000000
[    0.150101] [<c0840700>] (kernel_init) from [<c0108068>] (ret_from_fork+0x14/
0x2c)
[    0.150113]  r5:c0840700 r4:00000000
[    0.150135] ---[ end trace 56284dc760a78036 ]---
[    0.164115] omap_hwmod: debugss: _wait_target_disable failed
[    0.218180] cpuidle: using governor ladder
[    0.218227] cpuidle: using governor menu
[    0.224147] OMAP GPIO hardware version 0.1
[    0.234719] omap-gpmc 50000000.gpmc: could not find pctldev for node /ocp/l4_
wkup@44c00000/scm@210000/pinmux@800/nandflash_pins_s0, deferring probe
[    0.237187] No ATAGs?
[    0.237204] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.254609] edma 49000000.edma: TI EDMA DMA engine driver
[    0.259259] omap_i2c 44e0b000.i2c: could not find pctldev for node /ocp/l4_wk
up@44c00000/scm@210000/pinmux@800/pinmux_i2c0_pins, deferring probe
[    0.259347] omap_i2c 4802a000.i2c: could not find pctldev for node /ocp/l4_wk
up@44c00000/scm@210000/pinmux@800/pinmux_i2c1_pins, deferring probe
[    0.259402] omap_i2c 4819c000.i2c: could not find pctldev for node /ocp/l4_wk
up@44c00000/scm@210000/pinmux@800/pinmux_i2c2_pins, deferring probe
[    0.259534] media: Linux media interface: v0.10
[    0.259590] Linux video capture interface: v2.00
[    0.259752] pps_core: LinuxPPS API ver. 1 registered
[    0.259764] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giome
tti <giometti@linux.it>
[    0.259795] PTP clock support registered
[    0.259842] EDAC MC: Ver: 3.0.0
[    0.260416] dmi: Firmware registration failed.
[    0.260972] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
[    0.261406] Advanced Linux Sound Architecture Driver Initialized.
[    0.262897] clocksource: Switched to clocksource timer1
[    0.273921] NET: Registered protocol family 2
[    0.274869] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    0.274916] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
[    0.274954] TCP: Hash tables configured (established 2048 bind 2048)
[    0.275081] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.275108] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.275310] NET: Registered protocol family 1
[    0.275870] RPC: Registered named UNIX socket transport module.
[    0.275889] RPC: Registered udp transport module.
[    0.275899] RPC: Registered tcp transport module.
[    0.275909] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.277025] hw perfevents: no interrupt-affinity property for /pmu, guessing.

[    0.277179] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counter
s available
[    0.279060] workingset: timestamp_bits=14 max_order=16 bucket_order=2
[    0.285122] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.286066] NFS: Registering the id_resolver key type
[    0.286130] Key type id_resolver registered
[    0.286141] Key type id_legacy registered
[    0.286200] ntfs: driver 2.1.32 [Flags: R/O].
[    0.288888] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 2
45)
[    0.288914] io scheduler noop registered
[    0.288926] io scheduler deadline registered
[    0.289203] io scheduler cfq registered (default)
[    0.289219] io scheduler mq-deadline registered
[    0.289230] io scheduler kyber registered
[    0.291018] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[    0.358978] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled
[    0.363196] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 30, base_baud =
3000000) is a 8250
[    1.196993] console [ttyS0] enabled
[    1.201842] 48022000.serial: ttyS1 at MMIO 0x48022000 (irq = 31, base_baud =
3000000) is a 8250
[    1.211942] 481a6000.serial: ttyS2 at MMIO 0x481a6000 (irq = 32, base_baud =
3000000) is a 8250
[    1.221920] 481aa000.serial: ttyS3 at MMIO 0x481aa000 (irq = 33, base_baud =
3000000) is a 8250
[    1.232873] omap_rng 48310000.rng: Random Number Generator ver. 20
[    1.255084] brd: module loaded
[    1.266832] loop: module loaded
[    1.273199] libphy: Fixed MDIO Bus: probed
[    1.294294] davinci_mdio 4a101000.mdio: ####2#####   davinci_mdio_reset
[    1.352997] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1
000000
[    1.375267] libphy: 4a101000.mdio: probed
[    1.445602] davinci_mdio 4a101000.mdio: phy[10]: device 4a101000.mdio:0a, dri
ver TI DP83869
[    1.454048] davinci_mdio 4a101000.mdio: phy[11]: device 4a101000.mdio:0b, dri
ver TI DP83869
[    1.463620] cpsw 4a100000.ethernet: Detected MACID = 00:25:97:ce:ee:ec
[    1.470310] cpsw 4a100000.ethernet: initialized cpsw ale version 1.4
[    1.476770] cpsw 4a100000.ethernet: ALE Table size 1024
[    1.482076] cpsw 4a100000.ethernet: cpts: overflow check period 500 (jiffies)

[    1.490350] cpsw 4a100000.ethernet: cpsw: Detected MACID = 24:ff:50:cc:01:00
[    1.499106] i2c /dev entries driver
[    1.503285] IR NEC protocol handler initialized
[    1.507845] IR RC5(x/sz) protocol handler initialized
[    1.512957] IR RC6 protocol handler initialized
[    1.517509] IR JVC protocol handler initialized
[    1.522059] IR Sony protocol handler initialized
[    1.526716] IR SANYO protocol handler initialized
[    1.531441] IR Sharp protocol handler initialized
[    1.536183] IR MCE Keyboard/mouse protocol handler initialized
[    1.542042] IR XMP protocol handler initialized
[    1.548526] cpuidle: enable-method property 'ti,am3352' found operations
[    1.555955] sdhci: Secure Digital Host Controller Interface driver
[    1.562170] sdhci: Copyright(c) Pierre Ossman
[    1.566982] sdhci-pltfm: SDHCI platform and OF driver helper
[    1.573441] ledtrig-cpu: registered to indicate activity on CPUs
[    1.583710] NET: Registered protocol family 10
[    1.590062] Segment Routing with IPv6
[    1.594024] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    1.600868] NET: Registered protocol family 17
[    1.605807] Key type dns_resolver registered
[    1.610383] omap_voltage_late_init: Voltage driver support not added
[    1.623753] omap-gpmc 50000000.gpmc: GPMC revision 6.0
[    1.628953] gpmc_mem_init: disabling cs 0 mapped at 0x0-0x1000000
[    1.637493] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
[    1.644048] nand: Micron MT29F2G08ABAEAH4
[    1.648086] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB siz
e: 64
[    1.655833] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme
[    1.661327] 8 ofpart partitions found on MTD device omap2-nand.0
[    1.667405] Creating 8 MTD partitions on "omap2-nand.0":
[    1.672759] 0x000000000000-0x000000020000 : "NAND.SPL"
[    1.679340] 0x000000020000-0x000000040000 : "NAND.SPL.backup1"
[    1.686409] 0x000000040000-0x000000060000 : "NAND.SPL.backup2"
[    1.693405] 0x000000060000-0x000000080000 : "NAND.SPL.backup3"
[    1.700384] 0x000000080000-0x000000180000 : "NAND.u-boot"
[    1.707377] 0x000000180000-0x0000001a0000 : "NAND.u-boot-env1"
[    1.714369] 0x0000001a0000-0x0000001c0000 : "NAND.u-boot-env2"
[    1.721286] 0x0000001c0000-0x000010000000 : "NAND.RBlob"
[    1.883202] tps65910 0-002d: No interrupt support, no core IRQ
[    1.891509] vrtc: supplied by vbat
[    1.897999] random: fast init done
[    1.902335] vio: supplied by vbat
[    1.907361] vdd1: supplied by vbat
[    1.912756] vdd2: supplied by vbat
[    1.919789] vdig1: supplied by vbat
[    1.924843] vdig2: supplied by vbat
[    1.929847] vpll: supplied by vbat
[    1.934837] vdac: supplied by vbat
[    1.939758] vaux1: supplied by vbat
[    1.944827] vaux2: supplied by vbat
[    1.949820] vaux33: supplied by vbat
[    1.954954] vmmc: supplied by vbat
[    1.959874] vbb: supplied by vbat
[    1.964917] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    1.972056] omap_i2c 4802a000.i2c: bus 1 rev0.11 at 100 kHz
[    1.979036] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 100 kHz
[    1.986504] ubi0: attaching mtd7
[    2.002922] NOHZ: local_softirq_pending 40
[    3.427622] ubi0: scanning is finished
[    3.457627] ubi0: attached mtd7 (name "NAND.RBlob", size 254 MiB)
[    3.463893] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes
[    3.470804] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 512
[    3.477614] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096
[    3.484637] ubi0: good PEBs: 2034, bad PEBs: 0, corrupted PEBs: 0
[    3.490761] ubi0: user volume: 8, internal volumes: 1, max. volumes count: 12
8
[    3.498065] ubi0: max/mean erase counter: 2/0, WL threshold: 4096, image sequ
ence number: 1258468103
[    3.507264] ubi0: available PEBs: 0, total reserved PEBs: 2034, PEBs reserved
 for bad PEB handling: 40
[    3.516666] ubi0: background thread "ubi_bgt0d" started, PID 45
[    3.523046] hctosys: unable to open rtc device (rtc0)
[    3.528728] lis3_reg: disabling
[    3.532137] ALSA device list:
[    3.535239]   No soundcards found.
[    3.543027] UBIFS (ubi0:3): background thread "ubifs_bgt0_3" started, PID 46
[    3.628358] UBIFS (ubi0:3): recovery needed
[    3.791293] UBIFS (ubi0:3): recovery completed
[    3.796280] UBIFS (ubi0:3): UBIFS: mounted UBI device 0, volume 3, name "BANK
1_ROOTFS"
[    3.804282] UBIFS (ubi0:3): LEB size: 126976 bytes (124 KiB), min./max. I/O u
nit sizes: 2048 bytes/2048 bytes
[    3.814305] UBIFS (ubi0:3): FS size: 61583360 bytes (58 MiB, 485 LEBs), journ
al size 8634368 bytes (8 MiB, 68 LEBs)
[    3.824813] UBIFS (ubi0:3): reserved for root: 0 bytes (0 KiB)
[    3.830682] UBIFS (ubi0:3): media format: w4/r0 (latest is w5/r0), UUID A0D60
8A4-F0DF-44D9-AF8E-318F1ED4577E, small LPT model
[    3.842552] VFS: Mounted root (ubifs filesystem) on device 0:14.
[    3.849908] devtmpfs: mounted
[    3.854944] Freeing unused kernel memory: 1024K
[    3.902995] NOHZ: local_softirq_pending 40
[    3.922965] NOHZ: local_softirq_pending 202
[    3.962942] NOHZ: local_softirq_pending 40
INIT: version 2.88 booting
[    4.172977] NOHZ: local_softirq_pending 40
[    4.332956] NOHZ: local_softirq_pending 202
[    4.422998] NOHZ: local_softirq_pending 40
[    4.463084] UBIFS (ubi0:5): background thread "ubifs_bgt0_5" started, PID 53
[    4.541584] UBIFS (ubi0:5): recovery needed
[    4.637422] UBIFS (ubi0:5): recovery completed
[    4.642290] UBIFS (ubi0:5): UBIFS: mounted UBI device 0, volume 5, name "LICE
NSE"
[    4.649868] UBIFS (ubi0:5): LEB size: 126976 bytes (124 KiB), min./max. I/O u
nit sizes: 2048 bytes/2048 bytes
[    4.659903] UBIFS (ubi0:5): FS size: 3047424 bytes (2 MiB, 24 LEBs), journal
size 1015809 bytes (0 MiB, 6 LEBs)
[    4.670063] UBIFS (ubi0:5): reserved for root: 143937 bytes (140 KiB)
[    4.676584] UBIFS (ubi0:5): media format: w5/r0 (latest is w5/r0), UUID 2307F
BDD-E472-479A-9DA2-AEADF9940BEF, small LPT model
[    4.703047] UBIFS (ubi0:6): background thread "ubifs_bgt0_6" started, PID 55
[    4.787579] UBIFS (ubi0:6): recovery needed
[    4.927319] UBIFS (ubi0:6): recovery completed
[    4.932186] UBIFS (ubi0:6): UBIFS: mounted UBI device 0, volume 6, name "LOG"

[    4.939466] UBIFS (ubi0:6): LEB size: 126976 bytes (124 KiB), min./max. I/O u
nit sizes: 2048 bytes/2048 bytes
[    4.949464] UBIFS (ubi0:6): FS size: 35553280 bytes (33 MiB, 280 LEBs), journ
al size 1777664 bytes (1 MiB, 14 LEBs)
[    4.959995] UBIFS (ubi0:6): reserved for root: 1679269 bytes (1639 KiB)
[    4.966670] UBIFS (ubi0:6): media format: w5/r0 (latest is w5/r0), UUID AE44A
761-98B8-4153-B204-17A010794FA7, small LPT model
[    4.993058] UBIFS (ubi0:7): background thread "ubifs_bgt0_7" started, PID 57
[    5.078192] UBIFS (ubi0:7): recovery needed
[    5.280406] UBIFS (ubi0:7): recovery completed
[    5.285336] UBIFS (ubi0:7): UBIFS: mounted UBI device 0, volume 7, name "SETT
INGS"
[    5.293030] UBIFS (ubi0:7): LEB size: 126976 bytes (124 KiB), min./max. I/O u
nit sizes: 2048 bytes/2048 bytes
[    5.303025] UBIFS (ubi0:7): FS size: 77709312 bytes (74 MiB, 612 LEBs), journ
al size 3936256 bytes (3 MiB, 31 LEBs)
[    5.313529] UBIFS (ubi0:7): reserved for root: 3670402 bytes (3584 KiB)
[    5.320181] UBIFS (ubi0:7): media format: w5/r0 (latest is w5/r0), UUID C592F
996-6117-4BB6-9045-C32399224AF1, small LPT model
[    5.372995] NOHZ: local_softirq_pending 40
Starting udev
[    5.709945] udevd[78]: starting version 3.2.5
[    5.722944] NOHZ: local_softirq_pending 202
[    5.738945] random: udevd: uninitialized urandom read (16 bytes read)
[    5.749853] random: udevd: uninitialized urandom read (16 bytes read)
[    5.764064] random: udevd: uninitialized urandom read (16 bytes read)
[    5.781392] udevd[78]: specified group 'lp' unknown
[    5.815883] udevd[79]: starting eudev-3.2.5
[    5.842977] NOHZ: local_softirq_pending 40
[    8.457196] urandom_read: 1 callbacks suppressed
[    8.457211] random: dd: uninitialized urandom read (512 bytes read)
INIT: Entering runlevel: 5
Configuring network interfaces... [    8.744870] net eth0: initializing cpsw ver
sion 1.12 (0)
[    8.793147] TI DP83869 4a101000.mdio:0a: attached PHY driver [TI DP83869] (mi
i_bus:phy_addr=4a101000.mdio:0a, irq=POLL)
[    8.804054] Unable to handle kernel NULL pointer dereference at virtual addre
ss 00000000
[    8.812186] pgd = c0004000
[    8.824616] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[    8.831981] [00000000] *pgd=00000000
[    8.852521] Internal error: Oops: 80000007 [#1] PREEMPT ARM
[    8.858151] Modules linked in:
[    8.861238] CPU: 0 PID: 42 Comm: kworker/0:2 Tainted: G        W       4.14.6
7-gd315a9bb00 #17
[    8.869887] Hardware name: Generic AM33XX (Flattened Device Tree)
[    8.876036] Workqueue: events_power_efficient phy_state_machine
[    8.881987] task: cc23c600 task.stack: cc626000
[    8.886541] PC is at 0x0
[    8.889088] LR is at phy_start_aneg_priv+0x54/0x134
[    8.893987] pc : [<00000000>]    lr : [<c05b5ce8>]    psr: 200f0013
[    8.900282] sp : cc627ea0  ip : 00000001  fp : cc627ed4
[    8.905529] r10: c0d15280  r9 : 00000000  r8 : 00000000
[    8.910777] r7 : 00000000  r6 : cc562a7c  r5 : cc562a7c  r4 : cc562800
[    8.917334] r3 : 00000000  r2 : 00000000  r1 : 00000000  r0 : cc562800
[    8.923893] Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none

[    8.931061] Control: 10c5387d  Table: 8ab04019  DAC: 00000051
[    8.936833] Process kworker/0:2 (pid: 42, stack limit = 0xcc626208)
[    8.943129] Stack: (0xcc627ea0 to 0xcc628000)
[    8.947514] 7ea0: c0147ba4 c0173754 c0d0f800 cc23c600 caa23000 cc562a48 cc562
800 cc562a7c
[    8.955736] 7ec0: 00000000 c0d0ea80 cc627efc cc627ed8 c05b68d8 c05b5ca0 cc562
a48 cc61c300
[    8.963958] 7ee0: ccd7a500 00000000 c0d0ea80 00000000 cc627f34 cc627f00 c013f
fbc c05b65f0
[    8.972179] 7f00: ffffe000 c0d0ea94 00000008 cc61c300 c0d0ea80 cc61c318 ffffe
000 c0d0ea94
[    8.980401] 7f20: 00000008 c0d15280 cc627f74 cc627f38 c014028c c013fdd0 c0a9e
9e4 00000000
[    8.988621] 7f40: c0d4e82d c0d0ea80 c0140208 cc61df40 cc61db00 00000000 cc626
000 cc61c300
[    8.996842] 7f60: c0140208 cc04de8c cc627fac cc627f78 c0145ffc c0140214 cc61d
f58 cc61df58
[    9.005064] 7f80: 00000000 cc61db00 c0145ea0 00000000 00000000 00000000 00000
000 00000000
[    9.013284] 7fa0: 00000000 cc627fb0 c0108068 c0145eac 00000000 00000000 00000
000 00000000
[    9.021505] 7fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000
000 00000000
[    9.029725] 7fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000
000 00000000
[    9.037936] Backtrace:
[    9.040407] [<c05b5c94>] (phy_start_aneg_priv) from [<c05b68d8>] (phy_state_m
achine+0x2f4/0x4f0)
[    9.049238]  r8:c0d0ea80 r7:00000000 r6:cc562a7c r5:cc562800 r4:cc562a48
[    9.055982] [<c05b65e4>] (phy_state_machine) from [<c013ffbc>] (process_one_w
ork+0x1f8/0x444)
[    9.064551]  r9:00000000 r8:c0d0ea80 r7:00000000 r6:ccd7a500 r5:cc61c300 r4:c
c562a48
[    9.072334] [<c013fdc4>] (process_one_work) from [<c014028c>] (worker_thread+
0x84/0x680)
[    9.080467]  r10:c0d15280 r9:00000008 r8:c0d0ea94 r7:ffffe000 r6:cc61c318 r5:
c0d0ea80
[    9.088331]  r4:cc61c300
[    9.090887] [<c0140208>] (worker_thread) from [<c0145ffc>] (kthread+0x15c/0x1
64)
[    9.098323]  r10:cc04de8c r9:c0140208 r8:cc61c300 r7:cc626000 r6:00000000 r5:
cc61db00
[    9.106186]  r4:cc61df40
[    9.108747] [<c0145ea0>] (kthread) from [<c0108068>] (ret_from_fork+0x14/0x2c
)
[    9.116007]  r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:
c0145ea0
[    9.123870]  r4:cc61db00
[    9.126420] Code: bad PC value
[    9.131057] ---[ end trace 56284dc760a78038 ]---
modprobe: FATAL: Module ip_tables not found in directory /lib/modules/4.14.67-gd
315a9bb00
iptables-restore v1.6.2: iptables-restore: unable to initialize table 'nat'

Error occurred at line: 2
Try `iptables-restore -h' or 'iptables-restore --help' for more information.
run-parts: /etc/network/if-up.d/iptables: exit status 2
modprobe: FATAL: Module ip_tables not found in directory /lib/modules/4.14.67-gd
315a9bb00
iptables-restore v1.6.2: iptables-restore: unable to initialize table 'nat'

Error occurred at line: 2
Try `iptables-restore -h' or 'iptables-restore --help' for more information.
run-parts: /etc/network/if-up.d/iptables: exit status 2
mount: mounting securityfs on /sys/kernel/security failed: No such file or direc
tory
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Cache read/write disabled: interface file missing. (Kernel needs AppArmor 2.4 co
mpatibility patch.)
Warning: unable to find a suitable fs in /proc/mounts, is it mounted?
Use --subdomainfs to override.
Starting OpenBSD Secure Shell server: sshd
[   11.675490] random: sshd: uninitialized urandom read (32 bytes read)
done.
hwclock: can't open '/dev/misc/rtc': No such file or directory
starting rsyslogd ... done
chown: /dev/ttyS0: Too many levels of symbolic links
chown: /dev/ttyS1: Too many levels of symbolic links
chown: /dev/ttyS2: Too many levels of symbolic links
chown: /dev/ttyS3: Too many levels of symbolic links
health is active
grep: /home/lite/out/Config.xml: No such file or directory
sed: /home/lite/out/settings.xml: No such file or directory
cat: can't open '/home/lite/out/Config.xml': No such file or directory
cat: can't open '/home/lite/out/Config.xml': No such file or directory
Poky (Yocto Project Reference Distro) 2.5.1 sync261 /dev/console

sync261 login: [   25.219216] random: dccp: uninitialized urandom read (256 byte
s read)
[   25.570961] random: dccp: uninitialized urandom read (32 bytes read)
killall: slistend: no process killed
killall: sreadd: no process killed
[   26.570787] random: crng init done
[A
Password:
Login timed out after 60 seconds.

Poky (Yocto Project Reference Distro) 2.5.1 sync261 /dev/console

sync261 login: