Hi,
We have a mature product using a DM6446 processor booting Linux from a NAND device. Initially, we used Numonyx NAND01GR3B2CZA6F and migrated to a Micron MT29F1G08ABBDAH4-ITX. Now that flash is also obsolete, and Micron suggested a Micron MT29F1G08ABBFAH4-ITE. I have listed a couple of scenarios C and D and was wondering if they could work.
A. Numonyx NAND01GR3B2CZA6F (Original)
- Internal On Chip ECC: None
- Minimum required ECC: 1-bit ECC per 512 bytes
Flash Layout:
RBL - DM6446 1-bit HW ECC for loading UBL
UBL - DM6446 1-bit HW ECC for loading UBOOT
UBOOT - 4-bit BCH Software ECC for loading Linux
Linux Kernel/FS - 4-bit BCH Software ECC
B. Micron MT29F1G08ABBDAH4-ITX (Migrated)
- Internal On Chip ECC: 4 bit ECC that is initially disabled, but can be enabled
- Minimum required ECC: 4-bit ECC per 528 bytes
- Minimum required ECC for block 0 if PROGRAM/ERASE cycles are less than 1000: 1-bit ECC per 528 bytes
Flash Layout:
RBL - DM6446 1-bit HW ECC for loading UBL
UBL - Micron Internal 4-bit ECC for loading UBOOT
UBOOT - 4-bit BCH Software ECC for loading Linux
Linux Kernel/FS - 4-bit BCH Software ECC
C. Micron MT29F1G08ABBEAH4-ITX
- Internal On Chip ECC: None
- Minimum required ECC: 4-bit ECC per 528 bytes
- Minimum required ECC for block 0 if PROGRAM/ERASE cycles are less than 1000: 1-bit ECC per 528 bytes
Flash Layout:
RBL - DM6446 1-bit HW ECC for loading UBL
UBL - 4-bit BCH Software ECC for loading UBOOT
UBOOT - 4-bit BCH Software ECC for loading Linux
Linux Kernel/FS - 4-bit BCH Software ECC
D. Micron MT29F1G08ABBFAH4-ITE
- Internal On Chip ECC: 8 bit ECC that is always enabled and can not be disabled
- Minimum required ECC: 8-bit ECC per 544 bytes
Flash Layout:
RBL - DM6446 1-bit HW ECC for loading UBL
UBL - Micron Internal 8-bit ECC for loading UBOOT
UBOOT - Micron Internal 8-bit ECC for loading Linux
Linux Kernel/FS - Micron Internal 8-bit ECC
Questions:
1. Could either Scenario C or D work?
2. For Scenario C, is there an updated UBL that has 4 bit BCH Software ECC for reading/writing UBOOT? The UBL can only be 14KiB, and we are using around 13KiB now.
3. For Scenario D, will the DM6446 1-bit HW ECC cause any issue with the Internal On Chip ECC?
4. For Scenario D, is there a example of UBOOT and Linux Kernel modifications using the Flash On Chip 8-bit ECC?
Thank you in advance.
Danny
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