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Hi TI,
I have the following questions on TDA4VM PWM:
I add device-tree at dts:
mypru_icssg0_pwm3_pins_default: mypru_icssg0_pwm3_pins_default { pinctrl-single,pins = < J721E_IOPAD(0xb0, PIN_OUTPUT, 3) /* (AF28) PRG0_PRU0_GPO0.PRG0_PWM3_A0 */ >; }; timer3: timer@2430000 { compatible = "ti,omap3430-timer"; reg = <0x2430000 0x400>; interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer3"; ti,timer-pwm; status = "okay"; }; pwm3: dmtimer-pwm@3 { compatible = "ti,omap-dmtimer-pwm"; ti,timers = <&timer3>; #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&mypru_icssg0_pwm3_pins_default>; status = "okay"; };
enbale the related macros at tisdk_j7-evm_defconfig:
--- ../arch/arm64/configs/tisdk_j7-evm_defconfig +++ ../arch/arm64/configs/tisdk_j7-evm_defconfig @@ -6444,6 +6444,8 @@ # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_TIECAP=y CONFIG_PWM_TIEHRPWM=y +CONFIG_OMAP_DM_TIMER=y +CONFIG_PWM_OMAP_DMTIMER=y
Then I got compliing error:
implicit declaration of function ‘__omap_dm_timer_init_regs’; did you mean ‘omap_dm_timer_write_reg’? [-Werror=implicit-function-declaration]
Thanks
thanks
Hi,
DMTimer support is NOT present for TDA4VM.
For PWM Support please take a look at this FAQ: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/982074/faq-tda4vm-dra829v-j721e-how-to-enable-ehrpwm-on-j7-evm-using-linux
Best Regards,
Keerthy
Hi Keerthy,
thanks for your reply, after applying that patch I got below failures, could you help? I'm using SDK8.0, and I have double checked the DT
# dmesg | grep ti-syscon [ 0.571881] ti-syscon-gate-clk interconnect@100000:clk0: failed to find parent regmap [ 0.579896] ti-syscon-gate-clk: probe of interconnect@100000:clk0 failed with error -22
Hi,
5.10 kernel needs some changes in DT:
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/982074/faq-tda4vm-dra829v-j721e-how-to-enable-ehrpwm-on-j7-evm-using-linux/4036779#4036779
I have responded with the fix in that FAQ.
That should fix the issue you are facing.
Closing this thread.
- Keerthy
Hi Keerthy,
This thread will help, could you please confirm one more question, that's I found in the 5.10 kernel DT, you modify the device-id of epwm0 to 40, but I check the J721E Clock Identifiers, the deivce-id of epwm0 should be 83 instead of 40, could you help to clarify this question? After that, this thread could be closed. thanks
In 5.10 DT:
ehrpwm0:pwm@3000000{ compatible="ti,am654-ehrpwm","ti,am3352-ehrpwm"; #pwm-cells=<3>; reg = <0x0 0x3000000 0x0 0x100>; power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>; clocks = <&ehrpwm_tbclk 0>, <&k3_clks 40 0>; clock-names = "tbclk", "fck"; };
In J721E Clock Identifiers:
This is for AM65 SoC. This was a reference on how to fix the issue you faced.
[ 0.579896] ti-syscon-gate-clk: probe of interconnect@100000:clk0 failed with error -22