TDA4VM: TDA4VM: Which boot mode should I set to run keywriter

Hi Henry,

Kerywritter is not dependent on the boot mode. As long as correct boot mode is selected in the boot pins, it should just work fine.. So can you please check boot pins? 

Regards,

Brijesh

Hi Brijesh,

Thanks for your reply.

The boot pins should be OK, since we change SOC to another XJ721E6BALF, our board bootup normally from SD card mode.

 Any other suggestions?

Thanks

Hi  Brijesh,

Get a patch about uart changes from TI guys and now MCU uart log is OK in sdcard mode.

Now we have only one issue.

From MCU and M3 log，it seems flash efuse successfully. but actually MPK not burned by parse UART mode log.

Any suggestion? 

Thanks

Update some logs based on SDK8.0 and keywriter SR1.1 package

R5 uart log: 

OTP Keywriter Version: 02.00.00.00 (Jul 21 2022 - 13:37:44)

 OTP Keywriter ver: 21.5.2--v2021.05b (Terrific Lla
OTP_VppEn
test_pmic_i2c_lld_intf_setup(): 493: PMIC_MAIN_INST I2C Setup...
test_pmic_i2c_lld_intf_setup(): 533: done...
I2C1: Passed for address 0x48 !!! 
[DEBUG] OTP_VppEn:(88), slave addr =0x4c
Key programming sequence initialted
Taking OTP certificate from 0x41c73004
Debug response: 0x0
Key programming sequence completed

M3 log:

0x400002
        0x800004
                0x4003005
                         0x4401552
                                  0x40000B
                                          0x800004
                                                  0x4003005
                                                           0x4401552
                                                                    0x40000D
                                                                            0x800004
                                                                                    0x20800000
                                                                                              0x20800001
                                                                                                        0x400002
                                                                                                                0x800004
                                                                                                                        0x4003005
                                                                                                                                 0x4401552
                                                                                                                                          0x409031
                                                                                                                                                  0x800004
                                                                                                                                                          #
                                                                                                                                                           # Decrypting extensions..
         #
          MPK Options:  0x0
                           MEK Options:  0x0
                                            MPK Opt P1:  0x0
                                                            MPK Opt P2:  0x0
                                                                            MEK Opt   :  0x0
                                                                                            * SMPKH Part 1 BCH code: a0d92479

                                                                                                                             * SMPKH Part 2 BCH code: a0ac26ca

                                                                                                                                                              * SMPK Hash (part-1,2):

          d254fe362f9f46acc2a214adb470c597524df15764dea5543d1b0d535acc1e7c00

                                                                            df3707914b9dd61608a3f63552babe2bfcb8897fd68466d7cf7a799c7a761b3500

                                                                                                                                              * SMEK BCH code: 003342db

                                                                                                                                                                       * SMEK Hash: fafdabd515cec9ab6fd84164427430150876a3298e90e00ee7a68d10e1a53b958f1c0e03fcc253e5ec0b362fbdca50e74a083d723a442ff930d36aae5a8df511

                                                                                                                                         EXT OTP extension disabled
                                                                                                                                                                   MSV extension disabled

              KEY CNT extension disabled

                                        KEY REV extension disabled

                                                                  SWREV extension disabled

                                                                                          FW CFG REV extension disabled

                                                                                                                       * KEYWR VERSION:  0x20000

                                                                                                                                                #
                                                                                                                                                 # Programming Keys..
                                                                                                                                                                     #

                                                                                                                                                                      * MSV: 
  [u32] bch + msv:  0x0
                       MSV extension disabled
                                             [u32] bch + msv:  0x0

                                                                  * SWREV: 
                                                                           [u32] SWREV-SYSFW:  0x1
                                                                                                  [u32] SWREV-SBL  :  0x1
                                                                                                                         SWREV extension disabled
                                                                                                                                                 [u32] SWREV-SYSFW:  0x1
                                                                                                                                                                        [u32] SWREV-SBL  :  0x1

                    * FW CFG REV: 
                                  [u32] SWREV-FW-CFG-REV:  0x1
                                                              SWREV SEC BCFG extension disabled
                                                                                               [u32] SWREV-FW-CFG-REV:  0x1

                                                                                                                           * EXT OTP: 
                                                                                                                                      EXT OTP extension disabled

                                                                                                                                                                * BMPKH, BMEK: 
    BMPKH extension disabled
                            BMEK extension disabled

                                                   * SMPKH, SMEK: 
                                                                  Programmed 11/11 rows successfully
                                                                                                    Programmed 2/2 rows successfully
                                                                                                                                    Programmed 11/11 rows successfully
                                                                                                                                                                      Programmed 2/2 rows successfully
                           Programmed 11/11 rows successfully
                                                             Programmed 2/2 rows successfully

                                                                                             * KEYCNT: 
                                                                                                       [u32] keycnt:  0x0
                                                                                                                         KEY CNT extension disabled
                                                                                                                                                   [u32] keycnt:  0x0

                                                                                                                                                                     * KEYREV: 
    [u32] keyrev:  0x0
                      KEY REV extension disabled
                                                [u32] keyrev:  0x0

R5 log in UART mode

=========================================================================
02000000011a00006a376573000000000000000048534653010101000101010002a6010000000000aa1f8e3095042e5c71ac40ede5b4e8c85fa87e03305ae0ea4f47933e89f4164aeb5a12ae13778f49de0622c1a578e6e747981d8
c44a130f89a336a887a7955eead0bc40b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000cc5a0a74c1e69d3c3a4b606d1fda6f8d6c5b5a7a41b0337f83edb49e20ba88f4
=========================================================================

====== parsed log =======
-----------------------
SoC ID Header Info:
-----------------------
('NumBlocks            :', [2])
-----------------------
SoC ID Public ROM Info:
-----------------------
('SubBlockId           :', 1)
('SubBlockSize         :', 26)
('DeviceName           :', 'j7es\x00\x00\x00\x00\x00\x00\x00')
('DeviceType :', 'HSFS')
('DMSC ROM Version     :', [0, 1, 1, 1])
('R5 ROM Version       :', [0, 1, 1, 1])
-----------------------
SoC ID Secure ROM Info:
-----------------------
('Sec SubBlockId       :', 2)
('Sec SubBlockSize     :', 166)
('Sec Prime            :', 1)
('Sec Key Revision     :', 0)
('Sec Key Count        :', 0)
('Sec TI MPK Hash      :', 'aa1f8e3095042e5c71ac40ede5b4e8c85fa87e03305ae0ea4f47933e89f4164aeb5a12ae13778f49de0622c1a578e6e747981d8c44a130f89a336a887a7955ee')
('Sec Cust MPK Hash    :', 'ad0bc40b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000')
('Sec Unique ID :', 'cc5a0a74c1e69d3c3a4b606d1fda6f8d6c5b5a7a41b0337f83edb49e20ba88f4')

Hi,

The log still shows HSFS i.e HS-Field Securable. So what you have tried burning? Have you programmed the key revision and key version?
So in SD boot mode you copied the keywriter binary as tiboot3.bin and copied to Boot partition of your SD card?

- Keerthy

My detailed steps are as follows:

1. Download keywriter_patch.tar.gz from www.ti.com/.../08.00.00.12, decompress and replace the keywriter file in pdk_jacinto_08_00_00_37/packages/ti/boot folder

2. Download the OTP Keywriter add-on package, replace pdk_jacinto_08_00_00_37/packages/ti/boot/keywriter/tifs_bin/j721e/ti-fs-keywriter.bin, and copy ti_fek_public.pem file to pdk_jacinto_08_00_00_37/packages/ti/boot/keywriter/scripts

3. Generate Key
$ cd pdk_jacinto_08_00_00_37/ti/boot/keywriter/scripts
$ ./gen_keywr_cert.sh -g

4. Generate the corresponding X509 certification file
$ cd pdk_jacinto_08_00_00_37/ti/boot/keywriter/scripts
$ ./gen_keywr_cert.sh -s keys/smpk.pem --smek keys/smek.key -t ti_fek_public.pem -a keys/aes256.key
PS:
We notice that 'plain_key_rev' and 'plain_key_cnt' will be set to 1 by gen_keywr_cert.sh, so don't modify
templates/config_template.txt.

5. Make some changes
5.1 Enable uart in keywriter， Get this patch from our TI local support.
5.2 Change PMIC related code in keywriter to enable VPP_CORE and VPP_MCU according to our customer board.
Besides, no other changes.

6. Generate Keywriter image
$ cd pdk_jacinto_08_00_00_37/ti/build
$ make keywriter_img -j8

7. Flashing the keys to eFuses
7.1 $ cp pdk_jacinto_08_00_00_37/ti/boot/keywriter/binary/keywriter_img_j721e_release.tiimage /media/xxx/boot/tiboot3.bin
7.2 Connect MCU UART and M3 UART to PC, set bootmode to SDcard
7.3 Power up customer board and get the uart logs

We also try to burn efuse on SDK8.2 and using external power supply to VPP_CORE and VPP_MCU. We got the same flash log and
burned efuse failed too according to MCU UART log in UART boot mode.

Hi,

Can you share the patch that you are using to enable the VPP voltage? Also could you please verify if the voltage is indeed 1.8V?

- Keerthy

Subject: [PATCH] Enable VPP_ power supply

---
 ti/boot/keywriter/build/keywriter.mk          |   1 +
 ti/boot/keywriter/soc/j721e/keywriter_utils.c | 129 +++++++++---------
 ti/boot/keywriter/soc/j721e/keywriter_utils.h |   1 +
 ti/boot/keywriter/soc/j721e/pmic_example.c    |  14 +-
 ti/drv/pmic/src/pmic_core_priv.h              |   2 +-
 5 files changed, 78 insertions(+), 69 deletions(-)

diff --git a/ti/boot/keywriter/build/keywriter.mk b/ti/boot/keywriter/build/keywriter.mk
index 78c19f5..83cc801 100644
--- a/ti/boot/keywriter/build/keywriter.mk
+++ b/ti/boot/keywriter/build/keywriter.mk
@@ -15,6 +15,7 @@ INCDIR                      += $(PDK_INSTALL_PATH)/ti/board/src/$(BOARD)/include
 INCDIR                      += $(PDK_INSTALL_PATH)/ti/csl
 INCDIR                      += $(KEYWRITER_APP_DIR)/boardcfgs/$(SOC)
 INCDIR                      += $(PDK_INSTALL_PATH)/ti/drv/pmic
+INCDIR                      += $(PDK_INSTALL_PATH)/ti/drv/pmic/src
 INCDIR                      += $(PDK_INSTALL_PATH)/ti/drv/pmic/include
 INCDIR                      += $(PDK_INSTALL_PATH)/ti/drv/pmic/test/common
 INCDIR                      += $(PDK_INSTALL_PATH)/ti/drv/pmic/test/power_test
diff --git a/ti/boot/keywriter/soc/j721e/keywriter_utils.c b/ti/boot/keywriter/soc/j721e/keywriter_utils.c
index 22c72d6..87dc2ba 100644
--- a/ti/boot/keywriter/soc/j721e/keywriter_utils.c
+++ b/ti/boot/keywriter/soc/j721e/keywriter_utils.c
@@ -43,80 +43,83 @@
 static void keywr_leo_pmicb_set_params(Pmic_CoreCfg_t* pmicConfigData)
 {
     /* Fill parameters to pmicConfigData */
-    pmicConfigData->pmicDeviceType       = PMIC_DEV_LEO_TPS6594X;
-    pmicConfigData->validParams         |= PMIC_CFG_DEVICE_TYPE_VALID_SHIFT;
+    pmicConfigData->pmicDeviceType = PMIC_DEV_LEO_TPS6594X;
+    pmicConfigData->validParams |= PMIC_CFG_DEVICE_TYPE_VALID_SHIFT;
 
-    pmicConfigData->commMode             = PMIC_INTF_SINGLE_I2C;
-    pmicConfigData->validParams         |= PMIC_CFG_COMM_MODE_VALID_SHIFT;
+    pmicConfigData->commMode = PMIC_INTF_DUAL_I2C;
+    pmicConfigData->validParams |= PMIC_CFG_COMM_MODE_VALID_SHIFT;
 
-    pmicConfigData->slaveAddr            = J721E_LEO_PMICB_SLAVE_ADDR;
-    pmicConfigData->validParams         |= PMIC_CFG_SLAVEADDR_VALID_SHIFT;
+    pmicConfigData->slaveAddr = J721E_LEO_PMICA_SLAVE_ADDR;
+    pmicConfigData->validParams |= PMIC_CFG_SLAVEADDR_VALID_SHIFT;
 
-    pmicConfigData->qaSlaveAddr          = J721E_LEO_PMICB_WDG_SLAVE_ADDR;
-    pmicConfigData->validParams         |= PMIC_CFG_QASLAVEADDR_VALID_SHIFT;
+    pmicConfigData->qaSlaveAddr = J721E_LEO_PMICB_WDG_SLAVE_ADDR;
+    pmicConfigData->validParams |= PMIC_CFG_QASLAVEADDR_VALID_SHIFT;
 
-    pmicConfigData->pFnPmicCommIoRead    = test_pmic_regRead;
-    pmicConfigData->validParams         |= PMIC_CFG_COMM_IO_RD_VALID_SHIFT;
+    pmicConfigData->pFnPmicCommIoRead = test_pmic_regRead;
+    pmicConfigData->validParams |= PMIC_CFG_COMM_IO_RD_VALID_SHIFT;
 
-    pmicConfigData->pFnPmicCommIoWrite   = test_pmic_regWrite;
-    pmicConfigData->validParams         |= PMIC_CFG_COMM_IO_WR_VALID_SHIFT;
+    pmicConfigData->pFnPmicCommIoWrite = test_pmic_regWrite;
+    pmicConfigData->validParams |= PMIC_CFG_COMM_IO_WR_VALID_SHIFT;
 
-    pmicConfigData->pFnPmicCritSecStart  = test_pmic_criticalSectionStartFn;
-    pmicConfigData->validParams         |= PMIC_CFG_CRITSEC_START_VALID_SHIFT;
+    pmicConfigData->pFnPmicCritSecStart = test_pmic_criticalSectionStartFn;
+    pmicConfigData->validParams |= PMIC_CFG_CRITSEC_START_VALID_SHIFT;
 
-    pmicConfigData->pFnPmicCritSecStop   = test_pmic_criticalSectionStopFn;
-    pmicConfigData->validParams         |= PMIC_CFG_CRITSEC_STOP_VALID_SHIFT;
+    pmicConfigData->pFnPmicCritSecStop = test_pmic_criticalSectionStopFn;
+    pmicConfigData->validParams |= PMIC_CFG_CRITSEC_STOP_VALID_SHIFT;
 }
 
-
 void OTP_VppEn(void)
 {
-	uint16_t pmic_device_info;
-	uint16_t pwrRsrc;
-	int32_t status, pmicStatus;
-	Pmic_CoreHandle_t *pPmicCoreHandle  = NULL;
-    Pmic_CoreCfg_t pmicb_cfg            = {0U};
-	Pmic_PowerResourceCfg_t powerCfg_rd =
+    uint8_t pwrRsrc;
+    int32_t status, pmicStatus;
+    Pmic_CoreHandle_t *pPmicCoreHandle = NULL;
+    Pmic_CoreCfg_t pmicb_cfg = {0U};
+
+    UART_printf("OTP_VppEn\n");
+
+    keywr_leo_pmicb_set_params(&pmicb_cfg);
+
+    status = test_pmic_appInit(&pPmicCoreHandle, &pmicb_cfg);
+    pPmicCoreHandle->slaveAddr = J721E_LEO_PMICB_SLAVE_ADDR;   // PMCIB GPIO9
+
+    if (PMIC_ST_SUCCESS == status)
     {
-        PMIC_CFG_REGULATOR_VMON_VOLTAGE_SET_VALID_SHIFT,
-    };
-    Pmic_PowerResourceCfg_t pPowerCfg   =
+        /*  PMIC_B GPIO9 set to output */
+        pmicStatus = Pmic_commIntf_recvByte(pPmicCoreHandle, 0x39, &pwrRsrc);
+        if (pmicStatus == PMIC_ST_SUCCESS)
+        {
+            if (pwrRsrc != 0x01)
+            {
+                pmicStatus = Pmic_commIntf_sendByte(pPmicCoreHandle, 0x39, 0x01);
+                if (PMIC_ST_SUCCESS != pmicStatus)
+                {
+                    UART_printf("Pmic_commIntf_sendByte addr: 0x39 ret: %d\n", pmicStatus);
+                }
+            }
+        }
+        else
+        {
+            UART_printf("Pmic_commIntf_recvByte addr: 0x39 ret: %d\n", pmicStatus);
+        }
+
+        pmicStatus = Pmic_commIntf_recvByte(pPmicCoreHandle, 0x3E, &pwrRsrc);
+        if (pmicStatus == PMIC_ST_SUCCESS)
+        {
+            pwrRsrc |= 0x01;
+            pmicStatus = Pmic_commIntf_sendByte(pPmicCoreHandle, 0x3E, pwrRsrc);
+            if (PMIC_ST_SUCCESS != pmicStatus)
+            {
+                UART_printf("Pmic_commIntf_sendByte addr: 0x3E ret: %d\n", pmicStatus);
+            }
+        }
+        else
+        {
+            UART_printf("Pmic_commIntf_recvByte addr: 0x3E ret: %d\n", pmicStatus);
+        }
+    }
+
+    if ((pPmicCoreHandle != NULL) && (PMIC_ST_SUCCESS == status))
     {
-        PMIC_CFG_REGULATOR_VMON_VOLTAGE_SET_VALID_SHIFT,
-    };
-
-
-	UART_printf("OTP_VppEn\n");
-
-	pmic_device_info = J721E_LEO_PMICB_DEVICE;
-	(void)pmic_device_info;
-	keywr_leo_pmicb_set_params(&pmicb_cfg);
-
-	status = test_pmic_appInit(&pPmicCoreHandle, &pmicb_cfg);
-	
-	if(PMIC_ST_SUCCESS == status){
-		/*  Set Power Resource as LDO3 */
-	   	pwrRsrc = PMIC_TPS6594X_REGULATOR_LDO3;
-		pmicStatus = Pmic_powerGetPwrResourceCfg(pPmicCoreHandle,
-                                                 pwrRsrc,
-                                                 &powerCfg_rd);
-        if(PMIC_ST_SUCCESS != pmicStatus){
-			UART_printf("Pmic_powerGetPwrResourceCfg ret: %d\n", pmicStatus);
-		}
-
-        pPowerCfg.voltage_mV = KEYWRITER_VPP_VOLT_mV;
-
-		UART_printf("volate_mV: %u\n", pPowerCfg.voltage_mV);
-
-        pmicStatus = Pmic_powerSetPwrResourceCfg(pPmicCoreHandle,
-                                                 pwrRsrc,
-                                                 pPowerCfg);
-		if(PMIC_ST_SUCCESS != pmicStatus){
-			UART_printf("Pmic_powerSetPwrResourceCfg ret: %d\n", pmicStatus);
-		}
-	}
-
-	if((pPmicCoreHandle != NULL) && (PMIC_ST_SUCCESS == status)){
-		test_pmic_appDeInit(pPmicCoreHandle);
-	}
+        test_pmic_appDeInit(pPmicCoreHandle);
+    }
 }
diff --git a/ti/boot/keywriter/soc/j721e/keywriter_utils.h b/ti/boot/keywriter/soc/j721e/keywriter_utils.h
index bb181dd..9976d9c 100644
--- a/ti/boot/keywriter/soc/j721e/keywriter_utils.h
+++ b/ti/boot/keywriter/soc/j721e/keywriter_utils.h
@@ -42,6 +42,7 @@
 
 #include <pmic.h>
 #include <pmic_ut_power.h>
+#include <pmic_io_priv.h>
 
 #define KEYWRITER_VPP_VOLT_mV 1800U
 
diff --git a/ti/boot/keywriter/soc/j721e/pmic_example.c b/ti/boot/keywriter/soc/j721e/pmic_example.c
index 7df7d9f..2a321e9 100644
--- a/ti/boot/keywriter/soc/j721e/pmic_example.c
+++ b/ti/boot/keywriter/soc/j721e/pmic_example.c
@@ -1205,7 +1205,7 @@ int32_t test_pmic_appInit(Pmic_CoreHandle_t **pmicCoreHandle,
     /* For DUAL I2C Instance */
     else if(PMIC_INTF_DUAL_I2C == pmicConfigData->commMode)
     {
-        uint64_t delta = 0;
+        //uint64_t delta = 0;
         /* Get PMIC valid Main I2C Instance */
         pmicStatus = test_pmic_i2c_lld_intf_setup(pmicConfigData,
                                                   PMIC_MAIN_INST);
@@ -1216,11 +1216,13 @@ int32_t test_pmic_appInit(Pmic_CoreHandle_t **pmicCoreHandle,
             pmicConfigData->instType = PMIC_MAIN_INST;
             if(true == enableBenchMark)
             {
+#if 0
                 uint64_t t1 = 0;
                 t1 = print_timeTakenInUsecs(0U, NULL);
+#endif
                 /* Get PMIC core Handle for Main Instance */
                 pmicStatus = Pmic_init(pmicConfigData, pmicHandle);
-                delta = print_timeTakenInUsecs(t1, NULL);
+                //delta = print_timeTakenInUsecs(t1, NULL);
             }
             else
             {
@@ -1250,7 +1252,7 @@ int32_t test_pmic_appInit(Pmic_CoreHandle_t **pmicCoreHandle,
 
         if(PMIC_ST_SUCCESS == pmicStatus)
         {
-            pmicStatus = Pmic_intrClr(pmicHandle);
+            //pmicStatus = Pmic_intrClr(pmicHandle);
         }
 
         if(PMIC_ST_SUCCESS == pmicStatus)
@@ -1267,11 +1269,12 @@ int32_t test_pmic_appInit(Pmic_CoreHandle_t **pmicCoreHandle,
             }
         }
 
+#if 0
         if(PMIC_ST_SUCCESS == pmicStatus)
         {
             /* Get PMIC valid QA I2C Instance */
-            pmicStatus = test_pmic_i2c_lld_intf_setup(pmicConfigData,
-                                                      PMIC_QA_INST);
+            //pmicStatus = test_pmic_i2c_lld_intf_setup(pmicConfigData,
+            //                                          PMIC_QA_INST);
         }
 
         if(PMIC_ST_SUCCESS == pmicStatus)
@@ -1303,6 +1306,7 @@ int32_t test_pmic_appInit(Pmic_CoreHandle_t **pmicCoreHandle,
             /* Probe connected PMIC device on given i2c Instance */
             test_pmic_i2c_devices(pmicHandle, PMIC_QA_INST);
         }
+#endif
     }
     /* For SPI Instance */
     else if(PMIC_INTF_SPI  == pmicConfigData->commMode)
diff --git a/ti/drv/pmic/src/pmic_core_priv.h b/ti/drv/pmic/src/pmic_core_priv.h
index d823e9d..4c812df 100644
--- a/ti/drv/pmic/src/pmic_core_priv.h
+++ b/ti/drv/pmic/src/pmic_core_priv.h
@@ -60,7 +60,7 @@ extern "C" {
 #define PMIC_DEV_REV_REGADDR                (0x01U)
 #define PMIC_WDG_LONGWIN_CFG_REGADDR        (0x405U)
 /* On J7 1.0 EVM, PMIC_LEO_DEV_REV_ID is 0x08 */
-#define PMIC_LEO_DEV_REV_ID                 (0x08U)
+#define PMIC_LEO_DEV_REV_ID                 (0x82U)
 /* On J7 2.0 EVM, PMIC_LEO_DEV_REV_ID will be 0x03 */
 /* #define PMIC_LEO_DEV_REV_ID              (0x03U) */
 
-- 
2.37.1

We measured it by multimeter and voltage is 1.8V 

Hi Henry,

TI TDA4VM board has 2 options for VPP. One is via PMIC GPIO & the other is an always on source of 1.8V. So in your EVM are you using
the PMIC GPIO or the always on source?

Can you confirm that?

- Keerthy

Our customer board use PMIC GPIO.

We also try to use external power supply. 

Hello,

our circut design for VPP power is as below. And as Henry said, we also tried to use external power supply and it still didn't work till now.

VPP power.pdf

Hi Henry,

Can you try this patch:

From 9566e3a8858001e0815e33f5610af24f3948c896 Mon Sep 17 00:00:00 2001
From: Keerthy <j-keerthy@ti.com>
Date: Tue, 28 Jun 2022 10:18:00 +0530
Subject: [PATCH] packages/ti/boot/keywriter/soc/j721e/keywriter_utils.c:
 Enable GPIO9 of LEO PMICB for VPP

Enable GPIO9 of LEO PMICB for VPP

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 .../keywriter/soc/j721e/keywriter_utils.c     | 23 +++++--------------
 1 file changed, 6 insertions(+), 17 deletions(-)

diff --git a/packages/ti/boot/keywriter/soc/j721e/keywriter_utils.c b/packages/ti/boot/keywriter/soc/j721e/keywriter_utils.c
index e9a54ef..1fe9d7e 100644
--- a/packages/ti/boot/keywriter/soc/j721e/keywriter_utils.c
+++ b/packages/ti/boot/keywriter/soc/j721e/keywriter_utils.c
@@ -92,28 +92,16 @@ void OTP_VppEn(void)
 
     if (PMIC_ST_SUCCESS == status)
     {
-        /*  Set Power Resource as LDO3 */
-        pwrRsrc    = PMIC_TPS6594X_REGULATOR_LDO3;
-        pmicStatus = Pmic_powerGetPwrResourceCfg(pPmicCoreHandle,
-                                                 pwrRsrc,
-                                                 &powerCfg_rd);
+        /* Here is where we need to set GPIO9 of LEO PMICB */
+        pmicStatus = Pmic_gpioSetValue(pPmicCoreHandle, 9, PMIC_GPIO_HIGH);
 
         if (PMIC_ST_SUCCESS != pmicStatus)
         {
-            UART_printf("Pmic_powerGetPwrResourceCfg ret: %d\n", pmicStatus);
+            UART_printf("Pmic_gpioSetValue ret: %d\n", pmicStatus);
         }
-
-        pPowerCfg.voltage_mV = KEYWRITER_VPP_VOLT_mV;
-
-        UART_printf("volate_mV: %u\n", pPowerCfg.voltage_mV);
-
-        pmicStatus = Pmic_powerSetPwrResourceCfg(pPmicCoreHandle,
-                                                 pwrRsrc,
-                                                 pPowerCfg);
-
-        if (PMIC_ST_SUCCESS != pmicStatus)
+        else
         {
-            UART_printf("Pmic_powerSetPwrResourceCfg ret: %d\n", pmicStatus);
+            UART_printf("Pmic_gpioSetValue ret: %d Works!!!\n", pmicStatus);
         }
     }
 
@@ -121,4 +109,5 @@ void OTP_VppEn(void)
     {
         test_pmic_appDeInit(pPmicCoreHandle);
     }
+
 }
-- 
2.17.1

This will make sure GPIO9 from GPIO is toggled correctly when VPP is needed.

- Keerthy

Thanks a lot. I try it and it works now