CAN Error Frame and Sample point issue

Hi Jay,

I'll take a look at get back with you soon.

Thanks,
Frank

Frank,

   Customer report issue that canErrLogCnt always reports "zero" when recErrCnt is increasing.

typedef struct
{
uint32_t transErrLogCnt;
/**< Transmit Error Counter */
uint32_t recErrCnt;
/**< Receive Error Counter */
uint32_t rpStatus;
/**< Receive Error Passive
* 0 = The Receive Error Counter is below the error passive level(128)
* 1 = The Receive Error Counter has reached the error passive level(128)
*/
uint32_t canErrLogCnt;
/**< CAN Error Logging */
}MCAN_ErrCntStatus;

The API  MCAN_getErrCounters()  use to access ECR register to get error count:

/* Checking for Rx Errors */
MCAN_getErrCounters(gMcanBaseAddr, &errCounter);

According to MCAN manual which can be downloaded from here : https://www.bosch-semiconductors.com/ip-modules/can-ip-modules/m-can/

Byte access: Reading byte 2 will reset CEL to zero, reading bytes 3/1/0 has no impact.

However in SDK8.03 driver source code:

void MCAN_getErrCounters(uint32_t baseAddr,
MCAN_ErrCntStatus *errCounter)
{

errCounter->transErrLogCnt = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
MCAN_ECR_TEC);
errCounter->recErrCnt = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
MCAN_ECR_REC);
errCounter->rpStatus = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
MCAN_ECR_RP);

errCounter->canErrLogCnt = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
MCAN_ECR_CEL);
}

The first 3x 32bits access  will reset CEL field so the last call will always read "zero" into canErrLogCnt.

SDK driverlib needs to be modified and change counter read order to get correct result. 

void MCAN_getErrCounters(uint32_t baseAddr,
MCAN_ErrCntStatus *errCounter)
{
errCounter->canErrLogCnt = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
MCAN_ECR_CEL);
errCounter->transErrLogCnt = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
MCAN_ECR_TEC);
errCounter->recErrCnt = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
MCAN_ECR_REC);
errCounter->rpStatus = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
MCAN_ECR_RP);
// Issue: 2022/10. 17
// CEL always read as "zero" when access struct MCAN_ErrCntStatus;
// Change the access the order to ECR register since CEL will be reset after it is read
// errCounter->canErrLogCnt = HW_RD_FIELD32(MCAN_CfgAddr(baseAddr) + MCAN_ECR,
// MCAN_ECR_CEL);
// TEC, REC, and RP will not be impact by read access to ECR register
}

 Please double confirm and fix this issue in next version of SDK.

Regards

Andre

Hi,
Thanks for your help about Q1. The canErrLogCnt data can be changed after modify.
And is there any suggesting about Q2? I have a customer request about CAN sample point from 70% to 80%.
http://www.bittiming.can-wiki.info/
Now after I set up parameter like below and connect with Vector OE,there's error frame occur and than bus off.
bitTimes->nomRatePrescalar = 0xFU;
bitTimes->nomTimeSeg1 = 0x6U;
bitTimes->nomTimeSeg2 = 0x1U;
bitTimes->nomSynchJumpWidth = 0x0U;
bitTimes->dataRatePrescalar = 0x3U;
bitTimes->dataTimeSeg1 = 0x6U;
bitTimes->dataTimeSeg2 = 0x1U;
bitTimes->dataSynchJumpWidth = 0x0U;
How to solve this problem?

Thanks for your help.

Best Regards

Jay,

   May you try to increase bitTimes->nomSynchJumpWidth = bitTimes->dataSynchJumpWidth = 0x01U?

Increasing SJW to improve tolerance.  As long as SJW <= min(TSeg1, TSeg2) the setting should be OK.

Regards

Andre

Hi Andre,

AndreTseng said:

Please double confirm and fix this issue in next version of SDK.

Will you file an SDK bug for this?

Regards,
Frank

Frank,

        I don’t know if FAE has access right to file SDK bug. I don’t have Jira access neither. So can you please help to file SDK bug?

Thanks for your help.

Regards

Andre