DRA829V: QSPI ROM Boot

Hi Team,

I received the question below from my customer.

QSPI0-CS0 and QSPI01-CS0 are assigned MT25QL01GBBB(QSPI-Flash, 1Gb, 3.3V).QSPI0-CS0 will be used as the boot ROM.

The MT25QL01GBBB supports:

• 133 MHz (MAX) for all protocols in STR
• 90 MHz (MAX) for all protocols in DTR

1. At boot time, what MHz and SDR/DDR does it run? (There are descriptions of 33MHz, 50MHz, 33MHz, etc., but I could not find which QSPI corresponds to.)

2. Based on the following conditions in the datasheet, when executing the user program, is the loopback enabled 133 MHz for speed priority, and 49 MHz, DDR for no loopback?

Reference below:

7.10.5.21.2.2 OSPI Switching Characteristics - SDR Mode
SDR tc(CLK)=7.5ns => 133MHz
7.10.5.21.2.3 OSPI Timing Requirements - DDR Mode
SDR tc(CLK)=1.97ns => 52MHz

Best regards,

Mari Tsunoda