• State Resolved
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 9 replies
  • Subscribers 99 subscribers
  • Views 835 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

AM6412: Producing a pinout (for symbol creation) for the AM6412 device.

AM6412: AM6412 Pinout creation

ALEXANDROS APOSTOLIDIS
Prodigy 120 points
Part Number: AM6412
Other Parts Discussed in Thread: SYSCONFIG

Hello,

Back in my initial thread relative to the pin-out of the AM6412 CPU, I did ask for guidance if the following steps are the correct way to go...

1) Using the information presented in the latest datasheet. Table 6_1 , containing generic names

AND

2) Using the csv file from the sysconfig tool

I did have a reply (show below)

/////

Alex

A combination of both the datasheet and the SysConfig pinmux csv file would currently be the best way to to provide the necessary custom data for the schematic symbol.   

I think this could be a good enhancement to the tool, add an output file that could be used as a source for symbol generation. For this process, you would need ball name, signal name, ball number, direction.  Do you need any other data?

////

I want to clarify if the usage of Table 6.1 from the datasheet , is the correct way to go  schematic symbol creation.

I did spot some discrepancies between this table 6.1  (where there is no reference of the dual use of ADC In signals [can be GPIs] ) and table 6.2 (ADC0 Signal descriptions : There is reference that some signals can be used as GP inputs only)..

Please explain further as this is a very critical step for us.

Thanks

Alex

  • 0
    TI__Mastermind 27975 points

    Alex

    I do see the discrepancy that you have highlighted. I suspect the datasheet is correct and the tool should not be showing any GPI(O) options on the AINx pins. I am working to confirm this.

    Can you elaborate more ion the GP input only?

    --Paul 

  • 0 in reply to PaulM
    Prodigy 120 points

    Hello,

    The main issue that one can miss is that the datasheet , in the main table (6.1) for pin out purposes , won't explicitly mention the dual use of the ADC Pins.

    So for example in my case, where I haven't used the ADC pin G20 , and table 6.2 was mentioning only single use :ADC0_AIN0 , I almost missed the fact that this G20 is GPIO 80 , but with Input only use (this is mentioned in table 6.2).

    Also Sysconfig tool , wont inform for Input only use at GPIO  80 when ADC function is not selected.

    Please confirm that for our pinout we stick to the Sysconfig csv output and table 6.1 from datasheet.

    If this is not confirmed , please let us know as this is the most critical step at this phase...(to prepare a correct pinout)

    Thanks

    Alex

  • 0 in reply to ALEXANDROS APOSTOLIDIS
    Prodigy 120 points

    Hello Paul,

    Is there any update ?

    Thanks

    Alex

  • 0 in reply to ALEXANDROS APOSTOLIDIS
    TI__Mastermind 27975 points

    Alex

    Here is the correct information:

    1. The ADC AINx pins support the GPI function (not GPIO)
    2. AINx pins and muxed GPI pins are mutually exclusive – all AINx or all GPI, no mixing.
    3. Data sheet does not list the GPI pins in table 6-1 as no padconfig register exists

    The SysConfig tool needs to be updated to reflect the GPI only functionality of the AINx muxed pins, as well as their exclusive nature.

    --Paul 

  • 0 in reply to PaulM
    Prodigy 120 points

    Hello Paul,

    Thanks for the update.

    I need you to make clear the following please :

    1) In my case , where I will be using them as GP input pins , how will these be configured..since there is no Pad_Config register ?  The sysconfig tool , will have them selected as GPIO pins (80 to 87). Is there any special SW handling ?

    2) Please verify that table 6.1 of latest available datasheet is the table to use for our pin-out preparation.(CRITICAL)

    Thanks

    Alex

  • 0 in reply to ALEXANDROS APOSTOLIDIS
    TI__Mastermind 27975 points

    Alex

    ALEXANDROS APOSTOLIDIS said:
    1) In my case , where I will be using them as GP input pins , how will these be configured..since there is no Pad_Config register ?  The sysconfig tool , will have them selected as GPIO pins (80 to 87). Is there any special SW handling ?

    There are details on the GPI mode in the ADC chapter (12.1.1) of the device TRM, ADC GPI Integration.. The mux option is selected using the CTRLMMR_ADC0_CTRL register which is detailed in section 5.1 of the device TRM. 

    ALEXANDROS APOSTOLIDIS said:
    2) Please verify that table 6.1 of latest available datasheet is the table to use for our pin-out preparation.(CRITICAL)

    I do not see any changes pending that would impact table 6-1 of the datasheet.  However, I will confirm with the internal team. I may not have feedback until early next week. 

    --Paul

  • 0 in reply to PaulM
    Prodigy 120 points

    Hello,

    Ok for (1) 

    As far as (2) , take your time for this. Most critical on the other hand , is , if using the 6.1 table is the correct way to go preparing the schematic symbol pinout.

    Is this what TI suggests for pin-out preparation ? 

    Thanks

    Alex

  • 0 in reply to ALEXANDROS APOSTOLIDIS
    TI__Mastermind 27975 points

    I have confirmed that there are no updates to table 6-1 pending at this time. 

    You may also be able to use the default symbol as a baseline - https://www.ti.com/product/AM625?keyMatch=AM625&tisearch=search-everything&usecase=GPN#cad-cae-symbols

    --Paul

  • +1 in reply to PaulM
    Prodigy 120 points

    Hello,

    We will proceed in using table 6.1 and our sysconfig because the default symbol has issues with our Mentor DA version (we have opened a case 2 weeks ago for this).

    Thanks for all the support.