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Hi,
For our new project to be used in energy management we are looking for a processor(replacement for Omap L138) in TI Arm microprocessors portfolio.
The most critical requirements are;
1. Dual core processor. Arm for Linux OS plus a second core for processing voltage/current values read from an 8-channel external ADC.
2. 2 ethernet port and HSR/PRP.(Gigabit ethernet support is not mandatory)
3. Graphical LCD interface.(Touch screen will not be used)
Based on the above requirements AM6412 seems a good candidate except lack of a display interface.
For the LCD part we are planning to implement a graphical LCD driver in kernel level. But I need to clarify the following points.
1. Does the current SDK support HSR/PRP protocol on PRU-ICSS module offloading A53 core.
2. Is it possible to implement a bare metal application on R5 core to process data received from external ADCs via SPI interface.
3. Is it possible develop/debug bare metal application on R5 core without intervention of A53 core.
Best regards.
Hi Murat,
I can comment on #1 and will get some feedback from experts in the team regarding #2 and #3.
1. The latest SDK for AM6412 (AM64x) can support HSR/PRP protocol on PRU-ICSSG module with hardware offloading to the PRU-ICSSG module. See https://software-dl.ti.com/processor-sdk-linux-rt/esd/AM64X/latest/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Network/HSR_Offload.html?highlight=hsr for more details.
-Daolin
Feedback from the experts:
2. Yes. This uses standard SPI from PRU (ADS127) https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/latest/exports/docs/api_guide_am64x/EXAMPLES_PRU_ADC.html to talk to https://www.ti.com/product/ADS127L11.
If you don't want to use PRU, you can also use standard SPI https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/latest/exports/docs/api_guide_am64x/DRIVERS_MCSPI_PAGE.html.
3. Yes, this is the standard way to develop. https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/latest/exports/docs/api_guide_am64x/GETTING_STARTED.html
-Daolin
Hello Murat,
Some additional notes as you are evaluating AM64x for your design:
You can debug R5F core directly with CCS without Linux running on the A53 cores - that is documented in the MCU+ SDK docs that Daolin pointed out. You are ALSO debug the R5F core directly in CCS while Linux is running on the A53 cores. Information about that debug process (as well as other information about getting Linux A53 cores and RTOS/NO_RTOS R5F cores working alongside each other) is in the
AM64x academy > Multicore module
https://dev.ti.com/tirex/explore/node?a=7qm9DIS__LATEST&node=A__AeMVTHckwFDmFoNkRHpRPw__AM64-ACADEMY__WI1KRXP__LATEST
Regards,
Nick