AM5728: Arm +Xilinx FPGA display issue

Cherry Zhou

Part Number: AM5728

Hi team,

Here's a display related issues with the 5728 platform (5728 arm +Xilinx FPGA) may need your help:

1) The same RGB video source, FPGA direct Delivery Display (DVI), differs from the display output of arm through DVI: the display on the ARM side has a "misty" feel compared to the display output on the FPGA side.

2) The ARM-side display uses OVERLAY to overlay QT (GFX layer) data with video data (VID1 layer) sent from FPGA through API (DispObj type interface).

3) Video data that is currently positioned to the ARM side overlay is the same as data on the FPGA side, which excludes differences due to ARM video overlay.

And please see the attachment, fpga.bin is the video source on the FPGA side (BGR format: 1344X1080X3) and arm.bin is the captured overlay data via the WB module (BGRX format: 1920X1200X4).

https://e2echina.ti.com/cfs-file/__key/communityserver-discussions-components-files/120/arm.bin

https://e2echina.ti.com/cfs-file/__key/communityserver-discussions-components-files/120/fpga.bin

By analyzing the pixels at the corresponding location, the video data is the same, and figures 1 and 2 are visualizations of fpga.bin and arm.bin respectively, which are no different from the visual effects. But the difference is clear when the data on the arm side is sent to the display:

Figure 1

Figure 2

4) Based on the above analysis, customers are currently skeptical that the problem is due to processing of RGB data by the encoder in the DRM display framework (as shown in the first attachment). Dose GPU rendering do some processing of RGB pixel dots? Is it possible to turn off the processing via a register-like configuration and send the bypass directly?