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Original question:

Can_MsgmemRAMBaseAddr is defined multiple times at Can_Cfg.c file and Can_PBcfg.c file

Inside Can_IntISR_Function API, SchM_Enter_Can_CAN_EXCLUSIVE_AREA_0 is called twice which is affecting interrupt handling behviour.

Pradeep R
Intellectual 635 points

Hello Team,

In MCAL ti-processor-sdk-rtos-j721e-evm-08_05_00, Inside Can_Irq.c file, SchM_Enter_Can_CAN_EXCLUSIVE_AREA_0 is called at line number 102 before invoking Can_IntISR_Fun function and also immediately  at line number 1580 inside Can_MCan.c file while processing Can_mcanProcessISR function.

Because of this behavior, we are facinf interrupt handling issues. 

Expected behavior is each SchM_Enter_Can_CAN_EXCLUSIVE_AREA_0  should be followed by SchM_Exit_Can_CAN_EXCLUSIVE_AREA_0 , no simulatenous  invokation of same is applicable

Regards,

Pradeep R