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AM6412: micro SD card boot issue with SR2.0 devices

Koichiro Tashiro
Mastermind 22945 points
Part Number: AM6412

Hi,

My customer built proto-type boards with SR2.0 devices (AM6412BSCGHAALV).
But these boards showed a boot issue from micro SD card.
21 boards out of 60 boards showed the same behavior.

Boot sequence stops with below error.

Please note that the same error happens if no image is written in SD card, but the customer confirmed the image was properly written.

Remaining boards (39 out of 60) also showed the same error, but they can boot-up after ~10 times of power cycles.
After the first SD card boot, the ROM image is loaded on eMMC. Then the system boots up from eMMC after that.
No issue observed with eMMC boot, so the issue is related to SD card boot.
And even among the same SD card part#, some cards passed and some cards failed.
The customer did not observed the issue with SR1.0 samples (XAM6442) and they did not change PCB around the device  for SR2.0.

It is very critical for customer development.
Please provide how to investigate the issue.

Thanks and regards,
Koichiro Tashiro

  • 0
    TI__Guru* 84085 points

    Tashiro-san 

    Will assign this to a combination of hardware and software apps.

    Few questions for you 

    1) What are the SD cards brand used, and did they see any sensitivity to different SD cards type. Can you confirm the same SD cards were used on SR1.0

    2) What was the SR1.0 quantity, how many boards build and working (given 0 failures)

    3) Reconfirm what changes were made going from SR1.0 to SR2.0 - you said did not change PCB around the device - please elaborate further.

    4) Was the schematic reviewed and has the customer done any checks around board manufacturing  issues etc?

    5) Any experiments done with SD card clock speed to see if the failure is lower at slower speed?

    Regards

    Mukul 

  • 0 in reply to Mukul Bhatnagar
    Prodigy 50 points

    Mukul-san,

    Thank you for your reply.

    This is Mr. Tashiro's customer.
    Answer about 1) to 5).
    1) We used SanDisk (32GB) and Buffalo (8GB). There was sensitivity. SanDisk (32GB): OK, Buffalo (8GB): NG
        We haven't checked it for SD1.0 yet.

    2) We built two times the proto-type boards with SR1.0. Total of 140 sheets. It is developed in the SD card boot environment, and no failure has occurred.

    3) Regarding the SD card, only the card shell case is changed.

    4) Schematic review not requested.

    5) Although it is limited to SDR50 after starting Linux, it is recognized as a fixed speed at boot time.
        We will try it at slower speed.

    Thanks and regards,
    Naoyuki Hattori

  • 0 in reply to Naoyuki Hattori
    TI__Guru 69350 points

    Hello Naoyuki-san,
    Thanks for your reply with additional details.

    Naoyuki Hattori said:
    1) We used SanDisk (32GB) and Buffalo (8GB). There was sensitivity. SanDisk (32GB): OK, Buffalo (8GB): NG
        We haven't checked it for SD1.0 yet.

    What are the SD card type or speed grade of the working card (SanDisk) and non-working card (Buffalo)?
    It will be interesting to check the working card and non-working card on the previous manufactured board with PG1.0 Soc?

    Naoyuki Hattori said:
    5) Although it is limited to SDR50 after starting Linux, it is recognized as a fixed speed at boot time.
        We will try it at slower speed.

    Please let us posted with the testing result with slow speed

    Best,
    -Hong

  • 0 in reply to Hong Guan64
    Prodigy 50 points

    Hong-san,
    Thank you for your reply.
    >What are the SD card type or speed grade of the working card (SanDisk) and non-working card (Buffalo)?
       (SanDisk) is SDHC UHS-1 class10. (Buffalo) is same also.
    >It will be interesting to check the working card and non-working card on the previous manufactured board with PG1.0 Soc?
       The both cards work on the board with PG1.0 SoC.

     >Please let us posted with the testing result with slow speed.
       We checked at 25MHz of Default speed. It works, but sometimes it doesn't.

    Thanks and Regards,
    Naoyuki Hattori

  • 0 in reply to Naoyuki Hattori
    TI__Guru 69350 points

    Hello Naoyuki-san,
    Thank you for your reply.
    I'm attaching a reference log file:
    - Linux SDK 8.6 running on TI AM64x EVM (PROC101C with SR2.0 HS-FS SoC)
    - I added additional log on SD/eMMC speed etc...(attaching the patch for additional log)
    - The log file booting from SD card with additional SD/eMMC speed data, plus accessing eMMC @u-boot...

    Can we run similar test on your setup?
    1/. add additional log (similar as I did) to see any correlations of the issue vs SD speed grade
    2/. run test with non-working SD on TI AM64x EVM if available.

    Best,
    -Hong

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/am64x_5F00_mmc_5F00_speed_5F00_log.patch

    Fullscreen am64x_mmc_speed_test.log Download 
    U-Boot SPL 2021.01-00001-g7e12ed6-dirty (Apr 19 2023 - 16:51:07 -0500)
Resetting on cold boot to workaround ErrataID:i2331
resetting ...

U-Boot SPL 2021.01-00001-g7e12ed6-dirty (Apr 19 2023 - 16:51:07 -0500)
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
SPL initial stack usage: 13424 bytes
Trying to boot from MMC2
mmc@fa00000: No vmmc supply
mmc@fa00000: No vqmmc supply
clock is disabled (0Hz)
selecting mode MMC legacy (freq : 0 MHz)
clock is enabled (400000Hz)
selecting mode MMC legacy (freq : 25 MHz)
sd card: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), ]
host: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), MMC High Speed (52MHz), UHS SDR12 (25MHz), UHS SDR25 (50MHz), UHS SDR50 (100MHz), UHS DDR50 (50MHz), UHS SDR104 (208MHz), ]
trying mode SD High Speed (50MHz) width 4 (at 50 MHz)
selecting mode SD High Speed (50MHz) (freq : 50 MHz)
clock is enabled (50000000Hz)
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.8(release):v2.8-226-g2fcd408bb3-dirty
NOTICE:  BL31: Built : 13:45:56, Feb 27 2023
I/TC: 
I/TC: OP-TEE version: 3.20.0 (gcc version 9.2.1 20191025 (GNU Toolchain for the A-profile Architecture 9.2-2019.12 (arm-9.10))) #1 Mon Feb 27 13:46:53 UTC 2023 aarch64
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
I/TC: SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
I/TC: HUK Initialized
I/TC: Activated SA2UL device
I/TC: Enabled firewalls for SA2UL TRNG device
I/TC: SA2UL TRNG initialized
I/TC: SA2UL Drivers initialized
I/TC: Primary CPU switching to normal world boot

U-Boot SPL 2021.01-00001-g7e12ed6-dirty (Apr 19 2023 - 16:50:53 -0500)
SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
Trying to boot from MMC2
clock is disabled (0Hz)
selecting mode MMC legacy (freq : 0 MHz)
clock is enabled (400000Hz)
selecting mode MMC legacy (freq : 25 MHz)
sd card: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), ]
host: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), MMC High Speed (52MHz), UHS SDR12 (25MHz), UHS SDR25 (50MHz), UHS SDR50 (100MHz), UHS DDR50 (50MHz), UHS SDR104 (208MHz), ]
trying mode SD High Speed (50MHz) width 4 (at 50 MHz)
selecting mode SD High Speed (50MHz) (freq : 50 MHz)
clock is enabled (50000000Hz)
Authentication passed
Authentication passed


U-Boot 2021.01-00001-g7e12ed6-dirty (Apr 19 2023 - 16:50:53 -0500)

SoC:   AM64X SR2.0 HS-FS
Model: Texas Instruments AM642 EVM
Board: AM64-GPEVM rev C
DRAM:  2 GiB
NAND:  0 MiB
MMC:   mmc@fa10000: 0, mmc@fa00000: 1
Loading Environment from FAT... clock is disabled (0Hz)
selecting mode MMC legacy (freq : 0 MHz)
clock is enabled (400000Hz)
selecting mode MMC legacy (freq : 25 MHz)
sd card: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), ]
host: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), MMC High Speed (52MHz), UHS SDR12 (25MHz), UHS SDR25 (50MHz), UHS SDR50 (100MHz), UHS DDR50 (50MHz), UHS SDR104 (208MHz), ]
trying mode SD High Speed (50MHz) width 4 (at 50 MHz)
selecting mode SD High Speed (50MHz) (freq : 50 MHz)
clock is enabled (50000000Hz)
OK
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
Net:   eth0: ethernet@8000000port@1
Hit any key to stop autoboot:  2  0 
=> mmc list
mmc@fa10000: 0
mmc@fa00000: 1 (SD)
=> mmc dev 1
clock is disabled (0Hz)
selecting mode MMC legacy (freq : 25 MHz)
clock is enabled (400000Hz)
selecting mode MMC legacy (freq : 25 MHz)
sd card: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), ]
host: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), MMC High Speed (52MHz), UHS SDR12 (25MHz), UHS SDR25 (50MHz), UHS SDR50 (100MHz), UHS DDR50 (50MHz), UHS SDR104 (208MHz), ]
trying mode SD High Speed (50MHz) width 4 (at 50 MHz)
selecting mode SD High Speed (50MHz) (freq : 50 MHz)
clock is enabled (50000000Hz)
switch to partitions #0, OK
mmc1 is current device
=> mmc info
Device: mmc@fa00000
Manufacturer ID: 3
OEM: 5344
Name: SS08G 
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
card capabilities: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), ]
host capabilities: widths [4, 1, ] modes [MMC legacy, SD High Speed (50MHz), MMC High Speed (52MHz), UHS SDR12 (25MHz), UHS SDR25 (50MHz), UHS SDR50 (100MHz), UHS DDR50 (50MHz), UHS SDR104 (208MHz), ]
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 7.4 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
=> mmc dev 0
clock is disabled (0Hz)
selecting mode MMC legacy (freq : 0 MHz)
clock is enabled (400000Hz)
selecting mode MMC legacy (freq : 25 MHz)
mmc: widths [8, 4, 1, ] modes [MMC legacy, MMC High Speed (26MHz), SD High Speed (50MHz), MMC High Speed (52MHz), MMC DDR52 (52MHz), HS200 (200MHz), HS400 (200MHz), ]
host: widths [8, 4, 1, ] modes [MMC legacy, MMC High Speed (26MHz), MMC High Speed (52MHz), MMC DDR52 (52MHz), HS200 (200MHz), HS400 (200MHz), ]
clock is enabled (25000000Hz)
trying mode HS400 (200MHz) width 8 (at 200 MHz)
selecting mode HS200 (200MHz) (freq : 200 MHz)
clock is enabled (200000000Hz)
selecting mode MMC High Speed (26MHz) (freq : 26 MHz)
clock is enabled (26000000Hz)
selecting mode HS400 (200MHz) (freq : 200 MHz)
clock is enabled (200000000Hz)
switch to partitions #0, OK
mmc0(part 0) is current device
=> mmc info
Device: mmc@fa10000
Manufacturer ID: 13
OEM: 14e
Name: S0J56 
Bus Speed: 200000000
Mode: HS400 (200MHz)
card capabilities: widths [8, 4, 1, ] modes [MMC legacy, MMC High Speed (26MHz), SD High Speed (50MHz), MMC High Speed (52MHz), MMC DDR52 (52MHz), HS200 (200MHz), HS400 (200MHz), ]
host capabilities: widths [8, 4, 1, ] modes [MMC legacy, MMC High Speed (26MHz), MMC High Speed (52MHz), MMC DDR52 (52MHz), HS200 (200MHz), HS400 (200MHz), ]
Rd Block Len: 512
MMC version 5.1
High Capacity: Yes
Capacity: 14.8 GiB
Bus Width: 8-bit DDR
Erase Group Size: 512 KiB
HC WP Group Size: 8 MiB
User Capacity: 14.8 GiB WRREL
Boot Capacity: 31.5 MiB ENH
RPMB Capacity: 4 MiB ENH
Boot area 0 is not write protected
Boot area 1 is not write protected
=>

  • 0 in reply to Hong Guan64
    TI__Guru 69350 points

    The log seems indicating SDK8.4 was used in your testing.
    Can we try run testing with SDK 8.6 on your setup?

  • 0 in reply to Hong Guan64
    Prodigy 50 points

    Hong-san,
    Thank you for your reply.
    I attached the test log file with non-working SD on our setup(SR2.0 SoC+SDK8.4) after apply your patch.
    Please check it.
    ------------------------------------------------------------------------
    U-Boot SPL 2021.01 (Apr 20 2023 - 09:27:23 +0900)
    Resetting on cold boot to workaround ErrataID:i2331
    resetting ...

    U-Boot SPL 2021.01 (Apr 20 2023 - 09:27:23 +0900)
    SYSFW ABI: 3.1 (firmware rev 0x0008 '8.4.7--v08.04.07 (Jolly Jellyfi')
    SPL initial stack usage: 13424 bytes
    Trying to boot from MMC2
    mmc@fa00000: No vmmc supply
    mmc@fa00000: No vqmmc supply
    clock is disabled (0Hz)
    selecting mode MMC legacy (freq : 0 MHz)
    clock is enabled (400000Hz)
    selecting mode MMC legacy (freq : 25 MHz)
    sd card: widths [4, 1] modes [MMC legacy, SD High Speed (50MHz)]
    host: widths [4, 1] modes [MMC legacy, SD High Speed (50MHz), MMC High Speed (52MHz), UHS SDR12 (25MHz), UHS SDR25 (50MHz), UHS SDR50 (100MHz), UHS DDR50 (50MHz)]
    trying mode SD High Speed (50MHz) width 4 (at 50 MHz)
    selecting mode SD High Speed (50MHz) (freq : 50 MHz)
    clock is enabled (50000000Hz)
    mmc_bread: Failed to read blocks
    Error reading cluster
    ** Unable to read file tispl.bin **
    No matching DT out of these options:

    No matching DT out of these options:

    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ###
    ------------------------------------------------------------------------
    Then,
    We don't have TI AM64x EVM (PROC101C with SR2.0 HS-FS SoC).
    SDK8.6 has not been ported yet.

    Thanks and Regards,
    Naoyuki Hattori

  • 0 in reply to Naoyuki Hattori
    Prodigy 50 points

    I attached the test log file by our setup(SR2.0 SoC+SDK8.6). It was same result.
    ------------------------------------------------------------------------
    U-Boot SPL 2021.01-dirty (Apr 20 2023 - 15:04:51 +0900)
    EEPROM not available at 80, trying to read at 81
    Reading on-board EEPROM at 0x51 failed 1
    Resetting on cold boot to workaround ErrataID:i2331
    resetting ...

    U-Boot SPL 2021.01-dirty (Apr 20 2023 - 15:04:51 +0900)
    EEPROM not available at 80, trying to read at 81
    Reading on-board EEPROM at 0x51 failed 1
    SYSFW ABI: 3.1 (firmware rev 0x0008 '8.6.4--v08.06.04 (Chill Capybar')
    SPL initial stack usage: 13424 bytes
    Trying to boot from MMC2
    mmc@fa00000: No vmmc supply
    mmc@fa00000: No vqmmc supply
    clock is disabled (0Hz)
    selecting mode MMC legacy (freq : 0 MHz)
    clock is enabled (400000Hz)
    selecting mode MMC legacy (freq : 25 MHz)
    sd card: widths [4, 1] modes [MMC legacy, SD High Speed (50MHz)]
    host: widths [4, 1] modes [MMC legacy, SD High Speed (50MHz), MMC High Speed (52MHz), UHS SDR12 (25MHz), UHS SDR25 (50MHz), UHS SDR50 (100MHz), UHS DDR50 (50MHz)]
    trying mode SD High Speed (50MHz) width 4 (at 50 MHz)
    selecting mode SD High Speed (50MHz) (freq : 50 MHz)
    clock is enabled (50000000Hz)
    mmc_bread: Failed to read blocks
    Error reading cluster
    ** Unable to read file tispl.bin **
    No matching DT out of these options:

    No matching DT out of these options:

    SPL: failed to boot from all boot devices
    ### ERROR ### Please RESET the board ###
    ------------------------------------------------------------------------
    Thanks and Regards,
    Naoyuki Hattori

  • 0 in reply to Naoyuki Hattori
    TI__Mastermind 22945 points

    Hi Hong,

    Could you update the status of your investigation?
    The customer is waiting for your reply.

    Thanks and regards,
    Koichiro Tashiro

  • 0 in reply to Koichiro Tashiro
    TI__Guru 69350 points

    Hello Naoyuki-san, Koichiro-san,
    Some update:
    - We've not been able to reproduce the reported issue on TI board yet.
    - From the log shared by Naoyuki-san, the non-working sd card is SD High Speed => the issue is most likely not due to i2312.
    >>>> the non-working log
    sd card: widths [4, 1] modes [MMC legacy, SD High Speed (50MHz)]
    host: widths [4, 1] modes [MMC legacy, SD High Speed (50MHz), MMC High Speed (52MHz), UHS SDR12 (25MHz), UHS SDR25 (50MHz), UHS SDR50 (100MHz), UHS DDR50 (50MHz)]
    trying mode SD High Speed (50MHz) width 4 (at 50 MHz)
    selecting mode SD High Speed (50MHz) (freq : 50 MHz)
    clock is enabled (50000000Hz)
    <<<<

    1/. Is the issue observed with any other SD card brand on your setup?
    2/. Is the issue observed with the non-working brand SD card consistently? i.e. the issue reproducible every time?
    3/. Is it possible to try reproducing the issue on TI reference board?

    Best,
    -Hong

  • 0 in reply to Hong Guan64
    Prodigy 50 points

    >1/.
    It also happens with other SD cards. However, there are some SD card brands that are not caused by the board. Some boards have no issues with the same SD card brand.

    >2/.
    Some boards have problems all the time, while others have occasional problems. The problem is reproduced if you try about 10 times even on the occasional board.

    >3/.
    I have never been able to reproduce the problem on a reference board.
    Also, there is only one reference board with AM64 SR2.0, but it was available separately, so I tried it, but the problem was not reproduced.