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TMS320C6654: Please check the PaRAM/register settings, including the status status of TC registers during EDMA operation.

Part Number: TMS320C6654
Other Parts Discussed in Thread: CCSTUDIO, SYSBIOS

Hi,team

My customer ask the following questions:

"We have created a board equipped with TMS320C6654CZH7 and are checking its operation.

The SPI of the low-speed ADC and DAC are connected to McBSP(RX) (TX) respectively to receive and transmit data simultaneously.

I have confirmed that the respective AD receive and DA transmission from the DSP core work in a single shot without any issues, but it does not work properly when I use EDMA3 to receive and transmit continuously.

Please check the PaRAM/register settings, including the status of TC registers during EDMA operation.

Thank you for your help."

Regards,

Katherine

  • Hi,Shankari G

    Thank you for your response and I will pass on your response to my customer.

    Regards,

    Katherine

  • Hi,Shankari G

    Thank you for your response and The following is an additional question from my customer.

    "


    I provide the additional information regarding this inquiry below.
    Please refer to the attached file.

    //ADC(mcbsp_rx0)-->L2_mem DMA
    The ADC(16bit,16ch) connected to mcbsp_rx0 acquires AD data consecutively in the array(ad_buf)
    in L2 memory.
    When EDMA is started with the attached program,
    A write error status occurs in ERRSTAT/ERRDET.
    TC0_ERRSTAT => 0x9
    TC0_ERRDET => 0x9
    It looks like TC can't write to the ad_buf[].

    //L2_mem-->DAC(mcbsp_tx0) DMA
    The DAC(32bit,8ch) connected to mcbsp_tx0 transmit DA data consecutively read from the array(ad_buf)
    in L2 memory.
    When EDMA is started with the attached program,
    A read error status occurs in ERRSTAT/ERRDET.
    TC1_ERRSTAT => 0x9
    TC1_ERRDET => 0x1
    It looks like TC can't read from the da_buf[].

    The SRC/DST(ad_buf, da_buf) address setting is incorrect?"

    Regards,

    Katherine

    #define MCBSP0_REVT         36          // receive event
    #define MCBSP0_XEVT         37          // transmit event
    #define MCBSP0_REVT_LINK    68          // receive event link
    #define MCBSP0_XEVT_LINK    69          // transmit event link
    #define	DMA_PARAM_p	0x02744000
    #define	DMA_LINK_p	0x02744000
    #define	dma_param(event)	((UINT *)(DMA_PARAM_p + event * 0x20))
    #define	dma_link(no)		((UINT *)(DMA_LINK_p + no * 0x20))
    #define DMA_DCHMAP_BASE 0x02740100
    #define MCBSP_DRR0  0x021B4000
    #define MCBSP_DXR0  0x021B4004
    #define DMA_TC0_ERRSTAT (*(volatile unsigned int *)0x02790120)
    #define DMA_TC0_ERRDET (*(volatile unsigned int *)0x0279012c)
    #define DMA_TC0_SADST (*(volatile unsigned int *)0x0279024c)
    #define DMA_TC1_ERRSTAT (*(volatile unsigned int *)0x02798120)
    #define DMA_TC1_ERRDET (*(volatile unsigned int *)0x0279812c)
    #define DMA_TC1_SADST (*(volatile unsigned int *)0x0279824c)
    
    int ad_buf[16];
    int da_buf[8];
    
    //init mcbsp
    MCBSP_SRGR0 = 0x90ff0001;	//32KSPS
    MCBSP_SPCR0 = 0x00002000;
    MCBSP_PCR0 = 0x00000a01;
    MCBSP_RCR0 = 0x00020940;	// delay_0,16word,16bit
    MCBSP_XCR0 = 0x000007a0;	// delay_0,8word,32bit
    MCBSP_SPCR0 |= MCBSP_GRST;	// samplerate_gen on
    MCBSP_SPCR0 |= MCBSP_FRST;	// frame_sync on
    
    DMA_DMAQNUM4 = 0x00100000;//E37(tx0):1, E36(rx0):0
    
    unsigned int *p;
    
    /////////////////////////////////////////////////////////////////////////////////
    //ADC(mcbsp_rx0)-->L2_mem DMA
    //ADC_16bit * 16ch 
    /////////////////////////////////////////////////////////////////////////////////
    DMA_EESRH &= ~(1 << (MCBSP0_REVT-32));//event_disable
    DMA_EECRH |= 1 << (MCBSP0_REVT-32);//event_clear
    
    //PaRAM Mapping
    *(unsigned int *)(DMA_DCHMAP_BASE + MCBSP0_REVT*4) = MCBSP0_REVT << 5;
    
    //PaRAM setup
    p = dma_param(MCBSP0_REVT);
    *p++ = 0x80000100;	//opt
    *p++ = (UINT)MCBSP_DRR0;	//src
    *p++ = (16 << 16) | 2;	//[31:16]bcnt,[15:0]acnt(byte)
    *p++ = (UINT)(ad_buf);	//dst
    *p++ = (4 << 16) | 0;	//bidx[31:16]dst,[15:0]src
    *p++ = (16 << 16) | ((UINT)dma_link(MCBSP0_REVT_LINK) & 0xffff);  //[31:16]bcntrld,[15:0]link
    *p++ = 0;   //cidx
    *p   = 0xffff;   //ccnt
    //
    p = dma_link(MCBSP0_REVT_LINK);
    *p++ = 0x80000100;  //opt
    *p++ = (UINT)MCBSP_DRR0;	//src
    *p++ = (16 << 16) | 2;	//[31:16]bcnt,[15:0]acnt(byte)
    *p++ = (UINT)(ad_buf);
    *p++ = (4 << 16) | 0;	//bidx[31:16]dst,[15:0]src
    *p++ = (16 << 16) | ((UINT)dma_link(MCBSP0_REVT_LINK) & 0xffff);  //[31:16]bcntrld,[15:0]link
    *p++ = 0;   //cidx
    *p   = 0xffff;   //ccnt
    
    //ad_dma start
    DMA_EESRH |= (1 << (MCBSP0_REVT-32));	//event_en
    MCBSP_SPCR0 |= MCBSP_RRST;  // receiver enable
    
    //check error_reg after ad_dma start
    DMA_TC0_ERRSTAT => 0x9
    DMA_TC0_ERRDET => 0x9
    DMA_TC0_SADST => 0
    The ad_buf[] do not have valid data.(not changed)
    It seems DMAC cannot write ad_buf[] ?
    Source Active Destination Address Register(SADST) have no Destination Address?
    
    
    /////////////////////////////////////////////////////////////////////////////////
    //L2_mem-->DAC(mcbsp_tx0) DMA
    //DAC_32bit * 8ch 
    /////////////////////////////////////////////////////////////////////////////////
    DMA_EESRH &= ~(1 << (MCBSP1_XEVT-32));//event_disable
    DMA_EECRH |= 1 << (MCBSP1_XEVT-32);//event_clear
    
    //PaRAM Mapping
    *(unsigned int *)(DMA_DCHMAP_BASE + MCBSP0_XEVT*4) = MCBSP0_XEVT << 5;
    
    //PaRAM setup
    p = dma_param(MCBSP0_XEVT);
    *p++ = 0x80000200;	//opt
    *p++ = (UINT)(da_buf);	//src
    *p++ = (8 << 16) | 4;	//[31:16]bcnt,[15:0]acnt(byte)
    *p++ = (UINT)MCBSP_DXR0;	//dst
    *p++ = 0x4;	//bidx[31:16]dst,[15:0]src
    *p++ = (8 << 16) | ((UINT)dma_link(MCBSP0_XEVT_LINK) & 0xffff);	//[31:16]bcntrld,[15:0]link
    *p++ = 0;   //cidx
    *p   = 0xffff;   //ccnt
    //
    p = dma_link(MCBSP0_XEVT_LINK);
    *p++ = 0x80000200;  //opt
    *p++ = (UINT)(da_buf);	//src
    *p++ = (8 << 16) | 4;	//[31:16]bcnt,[15:0]acnt(byte)
    *p++ = (UINT)MCBSP_DXR0;	//dst
    *p++ = 0x4;	//bidx[31:16]dst,[15:0]src
    *p++ = (8 << 16) | ((UINT)dma_link(MCBSP0_XEVT_LINK) & 0xffff);  //[31:16]bcntrld,[15:0]link
    *p++ = 0;   //cidx
    *p   = 0xffff;   //ccnt
    
    DMA_TC1_ERRCLR = 0xf;
    DMA_EESRH |= (1 << (MCBSP0_XEVT-32));	//event_en
    
    //da dma start
    MCBSP_SPCR0 |= (MCBSP_XRST);  // transmitter enable
    
    //check error_reg after ad_dma start
    DMA_TC1_ERRSTAT => 0x9
    DMA_TC1_ERRDET => 0x1
    DMA_TC1_SADST => 0
    mcbsp_tx0 do not transmit valid data.
    It seems DMAC cannot read da_buf[] ?
    Source Active Destination Address Register(SADST) have no Destination Address.

  • Hi,Shankari G

    We look forward to hearing from you.

    Regards,

    Katherine

  • Katherine,

    By any chance, you have run the sample project of McBSP on your board? This sample is available as a part of Processor SDK 6.3

    --

    For McBSP, initialization and configuration sequence, please refer to the MCBSP example project of processor SDK 6.3

    This sample project is available at \ti\pdk_c665x_2_0_16\packages\MyExampleProjects\MCBSP_evmc6657_C66DigLpbkExampleProject

    Please visit this FAQ and video material on how to run this example : - [FAQ] 66AK2G12: How to run McBSP loop back test on K2G EVM ? - Processors forum - Processors - TI E2E support forums

    Please note, this FAQ is created for K2G device, however the steps remain same for C6657 as well.

    Please visit here if you want to know, how to create the PDK project: [FAQ] TMS320C6657: How to generate the CCS PDK examples for C6657? - Processors forum - Processors - TI E2E support forums

    --

    void McbspDevice_init(void)
    {
        int32_t devId = 0;
        void *key;
    
        /* Begin Critical Section before accessing shared resources. */
        key = Mcbsp_osalEnterMultipleCoreCriticalSection ();
    
        /* Invalidate the Cache Contents */
        Mcbsp_osalBeginMemAccess ((void *)Mcbsp_deviceInstInfo, sizeof(Mcbsp_deviceInstInfo));
    
        /* initialize the loop job buffers and the mute buffers for all instances  */
    #ifdef MCBSP_LOOPJOB_ENABLE
        Mcbsp_osalBeginMemAccess ((void *)Mcbsp_loopDstBuf, sizeof(Mcbsp_loopDstBuf));
        Mcbsp_osalBeginMemAccess ((void *)Mcbsp_loopSrcBuf, sizeof(Mcbsp_loopSrcBuf));
        memset((void *)Mcbsp_loopDstBuf,0x0,
            sizeof(Mcbsp_TempBuffer) * CSL_MCBSP_PER_CNT);
        memset((void *)Mcbsp_loopSrcBuf,0x0,
            sizeof(Mcbsp_TempBuffer) * CSL_MCBSP_PER_CNT);
    #endif /* MCBSP_LOOPJOB_ENABLE */
        Mcbsp_osalBeginMemAccess ((void *)Mcbsp_muteBuf, sizeof(Mcbsp_muteBuf));
        memset((void *)Mcbsp_muteBuf,0x0,
            sizeof(Mcbsp_TempBuffer) * CSL_MCBSP_PER_CNT);
    
        /* initialize the information for all the device instances                */
        for (devId = 0; devId < CSL_MCBSP_PER_CNT; devId++)
        {
            if (0 == devId)
            {
                /* instance 0 initialisation                                      */
                Mcbsp_deviceInstInfo[devId].obj.instNum = (uint32_t)devId;
                Mcbsp_deviceInstInfo[devId].obj.regs =
                    (CSL_McbspRegsOvly)CSL_Mcbsp0_CFG_DATA_REGS;
                Mcbsp_deviceInstInfo[devId].obj.fifoRegs =
                    (CSL_BfifoRegsOvly)CSL_Mcbsp0_FIFO_CFG_REGS;
                Mcbsp_deviceInstInfo[devId].obj.dataAddress =
                    (CSL_BdataRegsOvly)CSL_Mcbsp0_FIFO_DATA_REGS;
                Mcbsp_deviceInstInfo[devId].obj.edmaTxEventNum =
                    (uint32_t)CSL_EDMA3CC2_XEVT0_MCBSP_A;
                Mcbsp_deviceInstInfo[devId].obj.edmaRxEventNum =
                    (uint32_t)CSL_EDMA3CC2_REVT0_MCBSP_A;
                Mcbsp_deviceInstInfo[devId].obj.cpuTxEventNum =
                    (uint32_t)CSL_INTC0_XEVT0;
                Mcbsp_deviceInstInfo[devId].obj.cpuRxEventNum =
                    (uint32_t)CSL_INTC0_REVT0;
            }
            else if (1 == devId)
            {
                /* instance 1 initialisation                                      */
                Mcbsp_deviceInstInfo[devId].obj.instNum = (uint32_t)devId;
                Mcbsp_deviceInstInfo[devId].obj.regs =
                    (CSL_McbspRegsOvly)CSL_Mcbsp1_CFG_DATA_REGS;
                Mcbsp_deviceInstInfo[devId].obj.fifoRegs =
                    (CSL_BfifoRegsOvly)CSL_Mcbsp1_FIFO_CFG_REGS;
                Mcbsp_deviceInstInfo[devId].obj.dataAddress =
                    (CSL_BdataRegsOvly)CSL_Mcbsp1_FIFO_DATA_REGS;
                Mcbsp_deviceInstInfo[devId].obj.edmaTxEventNum =
                    (uint32_t)CSL_EDMA3CC2_XEVT1_MCBSP_B;
                Mcbsp_deviceInstInfo[devId].obj.edmaRxEventNum =
                    (uint32_t)CSL_EDMA3CC2_REVT1_MCBSP_B;
                Mcbsp_deviceInstInfo[devId].obj.cpuTxEventNum =
                    (uint32_t)CSL_INTC0_XEVT1;
                Mcbsp_deviceInstInfo[devId].obj.cpuRxEventNum =
                    (uint32_t)CSL_INTC0_REVT1;
            }
            else
            {
                /* do nothing                                                     */
            }
    #ifdef MCBSP_LOOPJOB_ENABLE
            /* align the buffers to the cache line size                           */
            Mcbsp_loopSrcBuf[devId].scratchBuffer = (uint32_t *)
                (((uint32_t)Mcbsp_loopSrcBuf[devId].scratchBuf + 0x7F) & ~0x7F);
    
            Mcbsp_loopDstBuf[devId].scratchBuffer = (uint32_t *)
                (((uint32_t)Mcbsp_loopDstBuf[devId].scratchBuf + 0x7F) & ~0x7F);
    
            Mcbsp_osalEndMemAccess ((void *)Mcbsp_loopSrcBuf, sizeof(Mcbsp_loopSrcBuf));
            Mcbsp_osalEndMemAccess ((void *)Mcbsp_loopDstBuf, sizeof(Mcbsp_loopDstBuf));
    #endif /* MCBSP_LOOPJOB_ENABLE */
            Mcbsp_muteBuf[devId].scratchBuffer = (uint32_t *)
                (((uint32_t)Mcbsp_muteBuf[devId].scratchBuf + 0x7F) & ~0x7F);
            Mcbsp_osalEndMemAccess ((void *)Mcbsp_muteBuf, sizeof(Mcbsp_muteBuf));
        }
    
        /* Writeback Global Objects */
        Mcbsp_osalEndMemAccess ((void *)Mcbsp_deviceInstInfo, sizeof(Mcbsp_deviceInstInfo));
    
        /* End Critical Section */
        Mcbsp_osalExitMultipleCoreCriticalSection (key);
    
        return;
    }
    

    Regards

    Shankari G

  • Hi,Shankari G

    Thank you for your response and I will pass on your response to my customers.

    Regards,

    Katherine

  • I tried to install CCS PDK examples for C6657 according to
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1040872/faq-tms320c6657-how-to-generate-the-ccs-pdk-examples-for-c6657

    but it cannot be installed correctly with ERROR messages.
    "MyExampleProjects" folder is created, but I cannot find any examples.

    Before executing BAT,
    I installed "processor_sdk_rtos_c665x_6_03_00_106" and "CCS 9.3." under C:\ti\

    My installing step is below.

    Are there any missing? Do I need another install?

    C:\ti\pdk_c665x_2_0_16\packages>pdksetupenv.bat
    ***************************************************
    Environment Configuration:
    ***************************************************
    SDK_INSTALL_PATH : C:/ti
    PDK_INSTALL_PATH : C:/ti/pdk_c665x_2_0_16/packages
    GMAKE_INSTALL_PATH : C:/ti/xdctools_3_55_02_22_core
    PDK_SOC : c665x
    PDK_VERSION : 2_0_16
    RULES_MAKE : C:/ti/pdk_c665x_2_0_16/packages/ti/build/Rules.make
    ***************************************************

    C:\ti\pdk_c665x_2_0_16\packages>pdkProjectCreate.bat C6657 all little all all dsp "C:\ti\pdk_c665x_2_0_16\packages"
    =========================================================================
    Configuration:
    SOC : C6657
    BOARD : all
    ENDIAN : little
    MODULE : all
    PROJECT_TYPE : all
    PROCESSOR : dsp
    PDK_SHORT_NAME : "C:\ti\pdk_c665x_2_0_16\packages"
    =========================================================================
    Checking Configuration...
    Complete
    =========================================================================
    PDK_PARTNO : C6657
    PDK_ECLIPSE_ID : com.ti.pdk.c665x
    RTSC_PLATFORM_NAME : ti.platforms.evm6657
    RTSC_TARGET : ti.targets.elf.C66
    CCS_DEVICE : "com.ti.ccstudio.deviceModel.C6000.GenericC64xPlusDevice"
    *****************************************************************************
    Detecting all projects in PDK and importing them in the workspace "C:\ti\pdk_c665x_2_0_16\packages"\MyExampleProjects
    Detected Test Project: cppi_evmc6657_c66BiosExampleProject

    --------------------------------------------------------------------------------
    Creating project 'cppi_evmc6657_c66BiosExampleProject'...

    NOTE: Compiler version '8.3.2' is not currently installed! - defaulting to '8.3.5'.
    !WARNING: No XDCtools, equivalent to the specified version '3.55.2.22', are available - defaulting to '3.60.2.34_core'.
    !ERROR: No products of type 'com.ti.rtsc.SYSBIOS' are currently installed!
    Copying macros.ini
    指定されたパスが見つかりません。(The specified path can not be found)
    0 個のファイルをコピーしました。(Copied 0 files)
    Detected Test Project: cppi_evmc6657_C66BiosTestProject
    --------------------------------------------------------------------------------
    Creating project 'cppi_evmc6657_C66BiosTestProject'...
    NOTE: Compiler version '8.3.2' is not currently installed! - defaulting to '8.3.5'.
    !WARNING: No XDCtools, equivalent to the specified version '3.55.2.22', are available - defaulting to '3.60.2.34_core'.
    !ERROR: No products of type 'com.ti.rtsc.SYSBIOS' are currently installed!
    Job found still running after platform shutdown. Jobs should be canceled by the plugin that scheduled them during shutdown: com.ti.ccstudio.devicemodel.DeviceModelLoader$InitializationJob$3
    Copying macros.ini
    指定されたパスが見つかりません。(The specified path can not be found)
    0 個のファイルをコピーしました。(Copied 0 files)
    Detected Test Project: EMAC_evmc6657_C66Loopback_testProject

  •  ,

    !ERROR: No products of type 'com.ti.rtsc.SYSBIOS' are currently installed!

    This error indicates, there seems to be some installation issue in your SYSBIOS - package.

    SYSBIOS is one of the component of processor SDK 6.3.

    Try the solution given in this post. : 

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/619431/rtos-evmk2g-pdkprojectcomplete-bat-fails-with-error-no-products-of-type-com-ti-rtsc-sysbios-are-currently-installed

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/922364/tms320c6678-compiler-version-8-3-2-not-installed-error-no-products-of-type-com-ti-rtsc-sysbios-are-currently-installed

    --

    Or else re-install the "processor_sdk_rtos_c665x_6_03_00_106"

    Regards

    Shankari G

  • Thank you for your advice.
    After running CCS9.3, the example projects was successfully generated.
    I do not use RTOS like "MCBSP Example Digital Loopback".

    As I previously informed,
    after starting edma(mcbsp-->L2_buf),
    a write error occurs in (TC)ERRSTAT/ERRDET.
    TC_ERRSTAT => 0x9
    TC_ERRDET => 0x9
    It shows address error for write.
    The L2_buf(destination) is no updated, but (TC)DFCNTx and DFDSTx is running.
    So it looks like TC can't write to the L2_buf,
    but edma is running by event from DRR.

    I summarize my configuration below.

    1. I can correctly get the ad_data of all channels from mcbsp(DRR) using DSP_core.
    2. Edma reads from mcbsp(DRR) and writes to L2_buf(destination). Not using mcbsp_RFIFO
    3. Not using RTOS for edma
    4. L2_buf is the array(ad_buf[]) in the user program.
    5. Not using interrupt of transfer complete

    Can I use the array in user program for destination/source of edma?
    Is RTOS needed for edma?
    Would you please advise?

  • user,

    RTOS may not be needed for edma but "MCBSP Example Digital Loopback" with RTOS has an appropriate configuration for the MCBSP peripheral.

    Just compare all the configuration settings done in the example - MCBSP Digital Loopback with your code and try to find the differences.....

    I guess, that is the only way to make it work.

    ( As it is your own code , you know better about the code and infact not possible for  any forum team member to debug the custom code..... )

    Regards

    Shankari G

  • Thank you for your responce.
    I successfully execute Edma(mcbsp->L2_buf, mcbsp<-L2_buf)
    by changing src/dst address configuration.

  • user,

    Glad to hear that you are able to fix.

    COngratulations. Good going!. Keep it up.

    Regards

    Shankari G