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AM62X-PET-CALC: What's the SRi paraemeter meaning?

Part Number: AM62X-PET-CALC

Hi TI expert

For Reset input signal there are SRi parameter listed in Datasheet, but i feel confuse about which edge SRi should be monitored and why?

For first power on stage, Reset pin 's rising time can't meet SRi > 3.3E+6 V/s spec, any risk?

BR Jingcheng

  • Hello Jingcheng,

    Thank you for the query.

    Can you help me understand the pin at which the input is being measured. Help me understand the IO voltage of the input pin.

    For Reset input signal there are SRi parameter listed in Datasheet, but i feel confuse about which edge SRi should be monitored and why?

    I am checking. on this.

    Regards,

    Sreenivasa

  • Hello Jingcheng,

    I am adding some additonal inputs for the question you have above:

    For Reset input signal there are SRi parameter listed in Datasheet, but i feel confuse about which edge SRi should be monitored and why?

    When the voltage applied to the input changes high-to-low or low-to-high the slew rate must be compliant to the limits defined in the datasheet.

    Slew rate y defines a rate of voltage change. The voltage limits that are important for this slew rate parameter occurs when the potential is between VILSS and VIHSS. This is where the voltage must be changing at a rate that is faster than the min value defined in the datasheet.

    This limit is defined to minimize the total accumulated time where shoot-through current is flowing from the IOs VDD supply to VSS through the input buffer when both the N-channel FETs and P-channel FETs are partially turned on at the same time. There could be long-term reliability concerns associated with the input buffer when the applied voltage is not compliant to the slew rate requirements defined in the datasheet.

    Regards,

    Sreenivasa

  • Hi Sreenivasa

    As SRi spec item is for "There could be long-term reliability concerns", can i take as the option pass item?

    For low speed discrete signal , SRi parametre hard to meet this spec, as narmolly a decoupling cap is added nearby such input pin, for Example Reset_IN .

    BR Jingcheng

  • Hello Jingcheng,

    Thank you for the inputs.

    As SRi spec item is for "There could be long-term reliability concerns", can i take as the option pass item?

    Are you asking if it is Ok to continue to use.  This depends on how much time the transitions are applied, continuous occurring vs once in a while. 

    We do not recommend connecting caps at the inputs or the output of the SoC directly.

    If you need to have a cap, consider minimizing the cap.

    This is a system level choice and i am not in a position to say what is acceptable vs not acceptable other than providing the recommendations.

    Regards,

    Sreenivasa