AM62A7: BOOTMODE Using VCC1V8_SYS PU

 Hello Yantao Dong

Thank you for the query.

Please share a PDF version of the schematics that includes the Boot mode config and boot mode interface to verify.

Not sure on the need for 1.1K resistors on the VOUT0 signals.

A cap is required to be connected after the ferrite to avoid resonance.

You need to mount any one of the ferrite.

Regards,

Sreenivasa

Hi,Sreenivasa

Thanks for your reply.

attached pdf are the boot related schematics.

Please help me to check if there is any  potential issues related VDDSHV3 powered by 1.8V and any other possible problems.

Thank you very much 

Best regards

Yantao

K.pdf

Hello Tantao,

Thank you.

I will review and update the finding.

Based on quick review i have couple of suggestions 

SoC_DVDD3V3
Increase voltage rating of the 3T caps C522 and C523
Refer E2 version of the schematics.

4 terminal resistors

Looks like the current monitoring is not used and the current sense resistors are used for monitoring or isolation.

Recommend using a 5% 2 terminal resistor to optimize the cost.

Regards,

Sreenivasa

Hello Tantao,

I am seeing some observations that may need update.

I will review and share the same.

We have a FAQ that lists all the key collaterals to be used during custom board development.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1203305/faq-am62a7-and-am62a7-q1-custom-board-hardware-design-collaterals-to-get-started

The collaterals include the schematics review checklist, hardware design guide, DDR design guide that could be used.

TI recommends reviewing the schematics using these collaterals. 

Regards,

Sreenivasa

Thanks Sreenivasa

  1. C522 and C523 in E2 version schematic and BOM is wrong parts and can't be found in Murata's catolog.

  anyway,  I will find if there are 6.3V parts for here. Also it it better to select the part for powertrain usage instead of infotaiment.

  2. I will remove current sense resistors and short them or use the   2 terminal resistor to optimize the cost as you mentioned.

Best regards

Yantao

Hello Yantao,

Thank you.

For the 3 terminal, please use below numbers as reference

NFM18HC106D0J (10uF, 6.3V)

https://www.mouser.in/ProductDetail/Murata-Electronics/NFM18PC106D0J3L?qs=hd1VzrDQEGg0ElsZy71ezA%3D%3D

NFM15HC105D0J (1uF, 6.3V)

https://www.digikey.in/en/products/detail/murata-electronics/NFM15PC105D0J3D/18683520?cur=INR&lang=en

Yantao Dong said:

it it better to select the part for powertrain usage instead of infotaiment.

Please elaborate your query 

Yantao Dong said:

I will remove current sense resistors and short them or use the   2 terminal resistor to optimize the cost as you mentioned.

When you short, please note the net name change and make updates accordingly. The current sensor output net name going to the SoC or peripherals should be used.

Regards,

Sreenivasa

Hello Yantao,

I see that you have reused the EVM design. 

We have a FAQ that provides guidance to be followed.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1203692/faq-am62a7-or-am62a3-custom-board-hardware-design---reusing-ti-evm-design-files

Regards,

Sreenivasa

Hi Sreenivasa

Thank you.

Any other issues about my change about VDDSHV3, expecially about boot.

Thanks 

Hello Yantao,

I will review and provide the inputs in next couple of days.

The MCU_I2C0 and WKUP_I2C0 I2C interface needs to be pulled up irrespective of the IO configuration.

Refer 6.4 Pin Connectivity Requirements in the data sheet.

Regards,

Sreenivasa

3364.K.pdf

Hello Yantao,

Please refer attached PDF with comments embedded.

Regards,

Sreenivasa

Hi, Sreenivasa

Thank you for your suggestions, and I will follow it.

So no isssues for VDDSHV3 and bootmode pullups using VCC1V8_SYS, right?

Thanks

Best regads

Hello Yantao,

I have the review comments embedded.

Please refer to the Pin attributes section of the data sheet to verify the IO supply rail that can be used for the boot mode.

A cap is required after the ferrite to minimize resonance.

Regards,

Sreenivasa