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Hello,
Could you please let me know if I can leave these GPIOs pins floated if I'm not using them?
I didn't find any direct answer for this question at HW design guide for Keystone devices document
These signals have internal pulls as defined here:
From a reliability perspective (assuming no other pulls that conflict) the pins will be held at a valid logic level with the internal pull.
If you're ok with the resulting functionality, then no need to pull them externally.
E.g., GPIO16 functions as a bootmode pin, and configures PCIE as enabled (pull high) or disabled (IPD pulls low by default).
Regards,
Kyle
