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AM6548: AM6548

Part Number: AM6548
Other Parts Discussed in Thread: TMDX654IDKEVM

Issue : CPSW_MDIO_USER_ACCESS_REG_0 register is not Clearing Go bit , when try to READ PHY register

Testing on :  Am65x IDK

RTOS

we have drivers written for SR1 and same drivers are used for SR2 as there is no change w.r.t CPSW from SR1 to SR2.

In SR1 IDK we don't see the issue there GO bit is getting cleared and able to access PHY registers, but in SR2 GO bit is not getting cleared.



Can you please let us know how to proceed or debug further?



  • Hello Bhargav Medamanuri

    Thank you for the query.

    Can you verify if the required pulls are available on the SR2 board. I assume these are different boards.

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    I don't understand what you mean by required pulls, 

    do you mean this?




    can you please elaborate. 



    Thanks & Regards,
    Bhargav

  • Hello Bhargav

    Thank you.

    The MDIO interface requires pullup near the PHY, i am checking if you have the required pullup and if this was similar for the SR1 and the SR2.

    Have you see the same behavior on multiple boards or is this seen on a specific board? 

    Looks like there is 2.1 silicon.

    Have you considered testing the newer version.

    Regards,

    Sreenivasa



  • Hi Sreenivasa,

    we are using  "TMDX654IDKEVM - AM65x industrial development kit (IDK)"  ,
    SR2 has required pull-up  and I don't see any difference w.r.t pullup resistor between SR1 and SR2. 

    I tested in 3 TMDX654IDKEVM(SR2.0) targets and the issue is observed in all devices.



    I was going through Errata document and I found following section(MDIO interface corruption CPSW),I am not sure whether the workaround provided in this solves my issue. If you think it might help solve the issue, Can you please provide software workaround for this?



  • Hello Bhargav

    Thank you. Understand this is an EVM.

    I was going to ask you the same question if you have reviewed the Errata as below 

    MDIO i2329 — MDIO: MDIO interface corruption (CPSW and PRU-ICSS)

    If you think it might help solve the issue, Can you please provide software workaround for this?

    There is a manual mode that is implemented in the linux vs the state change mode.

    Please elaborate the workaround requirements you mentioned.

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    I was referring to workaround for Manual Mode .

    Issue we are facing is "CPSW_MDIO_USER_ACCESS_REG_0 register is not Clearing Go bit , when try to access(READ/WRITE) PHY registers" 

    Can you please let us know what can be rootcause and how to overcome the issue? 

    Thanks & Regards,
    Bhargav