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Hi,TI
We want to using PCI-E Gigabit Ethernet on PCIe Interface on TDA4VM EVM. The module is REALTEK 8111, as follows:
The sdk we used:08_06_00_12
1.We can't found pinmux configuration of serdes0/1/2(pcie) in dts in sdk. Where can I find this?
2.We heard that Linux supports PCIe driver for gigabit ethernet after the KERNEL5.0. Is that right?
3.The module(RTL8111) slot on X2 lane PCIe interface, and using the default system(kernel 5.19). the log as follows:
root@j7-evm:~# dmesg |grep pci [ 1.206962] j721e-pcie 2900000.pcie: host bridge /bus@100000/pcie@2900000 ranges: [ 1.214632] j721e-pcie 2900000.pcie: IO 0x0010001000..0x0010010fff -> 0x0010001000 [ 1.222908] j721e-pcie 2900000.pcie: MEM 0x0010011000..0x0017ffffff -> 0x0010011000 [ 1.231185] j721e-pcie 2900000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000 [ 2.247371] j721e-pcie 2900000.pcie: PCI host bridge to bus 0000:00 [ 2.253810] pci_bus 0000:00: root bus resource [bus 00-ff] [ 2.259416] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] (bus address [0x10001000-0x10010fff]) [ 2.269106] pci_bus 0000:00: root bus resource [mem 0x10011000-0x17ffffff] [ 2.276160] pci 0000:00:00.0: [104c:b00d] type 01 class 0x060400 [ 2.282299] pci_bus 0000:00: 2-byte config write to 0000:00:00.0 offset 0x4 may corrupt adjacent RW1C bits [ 2.292248] pci 0000:00:00.0: supports D1 [ 2.296342] pci 0000:00:00.0: PME# supported from D0 D1 D3hot [ 2.302228] pci 0000:00:00.0: reg 0x224: [mem 0x00000000-0x003fffff 64bit] [ 2.309254] pci 0000:00:00.0: VF(n) BAR0 space: [mem 0x00000000-0x00ffffff 64bit] (contains BAR0 for 4 VFs) [ 2.321228] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 2.331223] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 2.337996] pci 0000:00:00.0: BAR 7: assigned [mem 0x10400000-0x113fffff 64bit] [ 2.345468] pci 0000:00:00.0: PCI bridge to [bus 01] [ 2.350766] pcieport 0000:00:00.0: PME: Signaling with IRQ 67 [ 2.357125] j721e-pcie 2910000.pcie: host bridge /bus@100000/pcie@2910000 ranges: [ 2.364794] j721e-pcie 2910000.pcie: IO 0x0018001000..0x0018010fff -> 0x0018001000 [ 2.373071] j721e-pcie 2910000.pcie: MEM 0x0018011000..0x001fffffff -> 0x0018011000 [ 2.381350] j721e-pcie 2910000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000 [ 2.492557] j721e-pcie 2910000.pcie: Link up [ 2.496925] j721e-pcie 2910000.pcie: Link up [ 2.501339] j721e-pcie 2910000.pcie: PCI host bridge to bus 0001:00 [ 2.507745] pci_bus 0001:00: root bus resource [bus 00-ff] [ 2.513350] pci_bus 0001:00: root bus resource [io 0x10000-0x1ffff] (bus address [0x18001000-0x18010fff]) [ 2.523218] j721e-pcie 2910000.pcie: LINK DOWN! [ 2.527846] pci_bus 0001:00: root bus resource [mem 0x18011000-0x1fffffff] [ 2.534891] pci 0001:00:00.0: [104c:b00d] type 01 class 0x060400 [ 2.541029] pci_bus 0001:00: 2-byte config write to 0001:00:00.0 offset 0x4 may corrupt adjacent RW1C bits [ 2.550957] pci 0001:00:00.0: supports D1 [ 2.555053] pci 0001:00:00.0: PME# supported from D0 D1 D3hot [ 2.562864] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 2.571135] pci 0001:01:00.0: [10ec:8168] type 00 class 0x020000 [ 2.577303] pci 0001:01:00.0: reg 0x10: [io 0x0000-0x00ff] [ 2.583032] pci 0001:01:00.0: reg 0x18: [mem 0x00000000-0x00000fff 64bit] [ 2.589991] pci 0001:01:00.0: reg 0x20: [mem 0x00000000-0x00003fff 64bit] [ 2.597122] pci 0001:01:00.0: supports D1 D2 [ 2.601485] pci 0001:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold [ 2.632426] j721e-pcie 2910000.pcie: LINK DOWN! [ 2.642864] pci 0001:01:00.0: calc_l1ss_pwron: Invalid T_PwrOn scale: 3 [ 2.651420] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01 [ 2.658192] pci 0001:00:00.0: BAR 14: assigned [mem 0x18100000-0x181fffff] [ 2.665219] pci 0001:00:00.0: BAR 13: assigned [io 0x10000-0x10fff] [ 2.671713] pci 0001:01:00.0: BAR 4: assigned [mem 0x18100000-0x18103fff 64bit] [ 2.679185] pci 0001:01:00.0: BAR 4: error updating (0x18100004 != 0xffffffff) [ 2.686574] pci 0001:01:00.0: BAR 2: assigned [mem 0x18104000-0x18104fff 64bit] [ 2.694061] pci 0001:01:00.0: BAR 0: assigned [io 0x10000-0x100ff] [ 2.700470] pci 0001:00:00.0: PCI bridge to [bus 01] [ 2.705545] pci 0001:00:00.0: bridge window [io 0x10000-0x10fff] [ 2.711950] pci 0001:00:00.0: bridge window [mem 0x18100000-0x181fffff] [ 2.718980] pcieport 0001:00:00.0: enabling device (0000 -> 0003) [ 2.725330] pcieport 0001:00:00.0: PME: Signaling with IRQ 70 [ 2.731712] j721e-pcie 2920000.pcie: host bridge /bus@100000/pcie@2920000 ranges: [ 2.739382] j721e-pcie 2920000.pcie: IO 0x4400001000..0x4400010fff -> 0x0000001000 [ 2.747659] j721e-pcie 2920000.pcie: MEM 0x4400011000..0x4407ffffff -> 0x0000011000 [ 2.755935] j721e-pcie 2920000.pcie: IB MEM 0x0000000000..0xffffffffffff -> 0x0000000000 [ 3.767297] j721e-pcie 2920000.pcie: PCI host bridge to bus 0002:00 [ 3.773727] pci_bus 0002:00: root bus resource [bus 00-ff] [ 3.779334] pci_bus 0002:00: root bus resource [io 0x20000-0x2ffff] (bus address [0x1000-0x10fff]) [ 3.788580] pci_bus 0002:00: root bus resource [mem 0x4400011000-0x4407ffffff] (bus address [0x00011000-0x07ffffff]) [ 3.799354] pci 0002:00:00.0: [104c:b00d] type 01 class 0x060400 [ 3.805493] pci_bus 0002:00: 2-byte config write to 0002:00:00.0 offset 0x4 may corrupt adjacent RW1C bits [ 3.815421] pci 0002:00:00.0: supports D1 [ 3.819515] pci 0002:00:00.0: PME# supported from D0 D1 D3hot [ 3.827326] pci 0002:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 3.837322] pci_bus 0002:01: busn_res: [bus 01-ff] end is updated to 01 [ 3.844090] pci 0002:00:00.0: PCI bridge to [bus 01] [ 3.849370] pcieport 0002:00:00.0: PME: Signaling with IRQ 73 root@j7-evm:~#
Could you give us some advices?
Best Regards,
Zhang
Hi Zhang,
I assume this is the same issue as this thread: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1312380/tda4vm-dts-of-clock-generator-cdci6214
And my understanding is that this new thread is using a different PCIe card.
Is the RTC module still used in this current thread? And if the RTC module is removed from device tree, does this new PCIe card start working as well?
1.We can't found pinmux configuration of serdes0/1/2(pcie) in dts in sdk. Where can I find this?
The pins that are used for PCIe do not have a pinmux, since they can only be used for serdes. Below is a screenshot of the datasheet: https://www.ti.com/lit/ds/symlink/tda4vm.pdf. The place of interest is the MUXMODE column, and in this column there are no other options.
Configuring which interface to assign to serdes is done by the serdes_ln_ctrl device tree node here: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts?h=ti-linux-5.10.y#n511
Regards,
Takuma