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[FAQ] AM62A7: Is it possible to adjust the timing of RMII TXD? RMII connection with Ethernet Switch IC - MAC-MAC RMII loopback

Part Number: AM62A7

Hello.


I'm developing custom board which has RMII connection with Ethernet Switch IC.
The AM62A and the Ethernet switch IC are connected via MAC-to-MAC mode.
The message 'eth0 Link is up' appears, but the ping command fails.
I suspect there may be a timing issue with the RMII TXD line.
After measuring with an oscilloscope, the output delay of the RMII_TXD line is approximately 4ns, whereas the output delay specification of the Ethernet switch IC is a minimum of 6ns.
Is is possible to adjust the output delay time of the RMII TXD?

Please refer to "Table 7-32. RMII[x]_TXD[1:0], and RMII[x]_TX_EN Switching Characteristics – RMII Mode" of AM62Ax Sitara Processors Data Sheet datasheet (Rev. A)


Thank you.
Best regards.

  • Hello Jae Young Choi

    Thank you for the query.

    Help me understand the RMII configuration you are using between the SoC and the Ethernet switch.

    A block diagram on the connection would help.

    Regards,

    Sreenivasa

  • Hello

    Block diagram is shown below.

    RMII pin mapping table is show below.

    Pin Description for RMII Ethernet Switch Signal External MAC TI MPU RGMII Signal TI MPU RMII Signal RMII Pin Type RMII Description  PIN
    Reference Clock REFCLKI_3
    REFCLKO_3
    REF_CLK RGMII1_RXC RMII1_REF_CLK I RMII Reference Clock AA16
    Carrier sense/Receive data valid SMRXDV3 CRS_DV RGMII1_TXC RMII1_CRS_DV I RMII Carrier Sense / Data Valid AB17
    Receive data bit 1 SMRXD31 RXD1 RGMII1_RD1 RMII1_RXD1 I RMII Receive Data 1 V15
    Receive data bit 0 SMRXD30 RXD0 RGMII1_RD0 RMII1_RXD0 I RMII Receive Data 0 AB16
    Transmit enable SMTXEN3 TX_EN RGMII1_TX_CTL RMII1_TX_EN O RMII Transmit Enable W16
    Transmit data bit 1 SMTXD31 TXD1 RGMII1_TD1 RMII1_TXD1 O RMII Transmit Data 1 V16
    Transmit data bit 0 SMTXD30 TXD0 RGMII1_TD0 RMII1_TXD0 O RMII Transmit Data 0 Y17

    When ping command is executed, RMII TXD[x] lines between RMII[1] and Port0 MAC show some signal

    But there is no signal in Port1

    Oscilloscope screen capture image is shown below.

    The yellow line at the top is the REF_CLK line, and the blue line at the bottom is the RMII TXD1 line

    Time delay is measured as 4.680ns here.

    It corresponds to RMII6 in the figure below

    Ethernet switch IC datasheet says that minimum output delay is 6ns. 

    I would like to increase the time delay from approximately 4.6ns to over 6ns. 

    Thank you. 

    Best regards. 

  • Hello Jae Young Choi

    Thank you for the inputs.

    We do not have provision to adjust the timing.

    Let me check with the device expert if they have any other suggestion.

    Regards,

    Sreenivasa

  • Hello Jae Young Choi,

    Please fer below inputs i received from the expert:

    After measuring with an oscilloscope, the output delay of the RMII_TXD line is approximately 4ns, whereas the output delay specification of the Ethernet switch IC is a minimum of 6ns.
    Is is possible to adjust the output delay time of the RMII TXD?

    The answer is similar to what i mentioned above - this is not supported.

     Can you verify if the MAC port in the Ethernet switch is capable of emulating a PHY.  If not, you will need to select a Ethernet switch that has a port with the capability of emulating a PHY because we do not support MAC to MAC connection on RMII.

    Regards,

    Sreenivasa

  • Thank you for your answer. 

    I'll check the Ethernet switch IC again. 

  • Hello Jae Young Choi,

    Thank you for the note.

    Regards,

    Sreenivasa