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Hi, TI engineers.
I design RMII interface circuit.
I will route the source from external 50MHz crystal oscillator to the MPU and 2 PHY chips.
In TRM, I am confused about the description of RMII_REF_CLK connection.
When using external clock source, other interface pins of RMII is indicated "n", n is 1 to 2, for example RMII"n"_TX_EN means RMII1_TX_EN and RMII2_TX_EN pin.
However, there is no "n" for RMII_REF_CLK.
In datasheet, RMII1_REF_CLK(pin AA16) & RMII2_REF_CLK(pin AA20) is surely noted.
1) Is this meaning that only one routing to Pin AA16 or Pin AA20 is OK except routing to PHY chips?
2) Or should I route both Pin AA16 & AA20 and 2 PHY chips?
In case of 1), I might need 3-output clock buffer(LMK1C1103).
Otherwise, for case 2), I have to use 4-output clock buffer(LMK1C1104).
And also, I want to know what the length of each routing path has to be.
Regard.
Thanks for your answer.
First of all, there was some mistake to express.
The meaning of the routing length is that each routing path has to be the same length. In my case, the four path of routing length (from a clock buffer to 2 refference clock input pin of AM62A7(AA16 & AA20) and 2 PHY chips) should be the same?
Secondly, what do you mean you recommend using dual output buffer?
I have already mentioned 3-channel and 4-channel clock out buffer IC.
Could you specify a model that you said as "dual output buffers"?
And I want you to explain about "design flexibility" in detail, if you don't mind.
Finally, I draw a simple schematic what I will design through your answer.
Is this correct?
I will wait for your reply.
Regard
