Currently the SDL CCM test caters only to MCU domain R5Fs. Provide the steps to port the SDL cpu_app to perform CCM on the Main Domain R5Fs.
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Currently the SDL CCM test caters only to MCU domain R5Fs. Provide the steps to port the SDL cpu_app to perform CCM on the Main Domain R5Fs.
Hi,
Please find below the steps to port the SDL cpu_app to perform CCM on the Main Domain -
1. Apply this patch on the base SDL directory, to modify the existing cpu_app to run on the main domain using the below steps -
cd $RTOS_SDK/sdl/
git init
git add .
git commit -m "init commit"
git am $PATH_TO_PATCH_SHARED_BELOW
From aa1556f24ea5c248e828f87472f7b2aca4552256 Mon Sep 17 00:00:00 2001 From: Josiitaa RL <j-rl@ti.com> Date: Thu, 4 Apr 2024 15:42:58 +0530 Subject: [PATCH] Porting CCM cpu_app to eMCU/Main R5F - Includes macro changes from SDL_CCM_MCU_R5F0 to SDL_CCM_R5F0 - ESM events defined - CCM event bitmap modified Signed-off-by: Josiitaa RL <j-rl@ti.com> --- examples/cpu/cpu_example.c | 15 ++++++++------- examples/cpu/main.c | 8 +++++--- src/sdl/r5/sdl_ccm.c | 18 +++++++++--------- src/sdl/sdl_esm_core.h | 7 +++++++ 4 files changed, 29 insertions(+), 19 deletions(-) diff --git a/examples/cpu/cpu_example.c b/examples/cpu/cpu_example.c index 8126e39..7b3a49b 100755 --- a/examples/cpu/cpu_example.c +++ b/examples/cpu/cpu_example.c @@ -226,7 +226,7 @@ int32_t SDL_TEST_CCMSelfTest(void) UART_printf("\n R5F-CPU example application CCM self test: starting"); - result = SDL_CCM_selfTest(SDL_CCM_MCU_R5F0, + result = SDL_CCM_selfTest(SDL_CCM_R5F0, SDL_CCM_MONITOR_TYPE_OUTPUT_COMPARE_BLOCK, SDL_CCM_SELFTEST_TYPE_NORMAL, 0U, 10000000); @@ -258,7 +258,7 @@ int32_t SDL_TEST_CCMSelfTestErrorForce(void) UART_printf("\n R5F-CPU example application CCM self test with error forcing: starting"); - result = SDL_CCM_selfTest(SDL_CCM_MCU_R5F0, + result = SDL_CCM_selfTest(SDL_CCM_R5F0, SDL_CCM_MONITOR_TYPE_OUTPUT_COMPARE_BLOCK, SDL_CCM_SELFTEST_TYPE_ERROR_FORCING, 0U, 10000000); @@ -289,7 +289,7 @@ int32_t SDL_TEST_CCMInjectError(void) UART_printf("\n R5F-CPU example application CCM inject error: test starting"); - result = SDL_CCM_injectError(SDL_CCM_MCU_R5F0, SDL_CCM_MONITOR_TYPE_OUTPUT_COMPARE_BLOCK); + result = SDL_CCM_injectError(SDL_CCM_R5F0, SDL_CCM_MONITOR_TYPE_OUTPUT_COMPARE_BLOCK); if (result != SDL_PASS ) { UART_printf("\n R5F-CPU example application CCM inject failed"); @@ -357,7 +357,7 @@ int32_t CCM_Test_init (void) /* Wait for any self test running to settle */ Osal_delay(2000); /* Initialize CCM */ - result = SDL_CCM_init(0); + result = SDL_CCM_init(SDL_CCM_R5F0); if (result != SDL_PASS) { /* print error and quit */ UART_printf("CCM_Test_init: Error result = %d\n", result); @@ -368,7 +368,7 @@ int32_t CCM_Test_init (void) } Osal_delay(2000); /* Initialize CCM */ - result = SDL_CCM_verifyConfig(0); + result = SDL_CCM_verifyConfig(SDL_CCM_R5F0); if (result != SDL_PASS) { /* print error and quit */ UART_printf("R5F-CPU example application CCM_Test_init: Error result = %d\n", result); @@ -399,7 +399,7 @@ int32_t CCM_funcTest(void) { UART_printf("\nCCM Functional Test \r\n"); /* Run the test for diagnostics first */ - testResult = CCM_runTest(SDL_CCM_MCU_R5F0); + testResult = CCM_runTest(SDL_CCM_R5F0); } else { @@ -539,6 +539,7 @@ int32_t cpu_example_app(void) } } + /* MPU tests can be tested only on the core that they are being run on. Does not apply to Main Domain if(testResult == 0) { SDL_copyResetVector(); @@ -549,7 +550,7 @@ int32_t cpu_example_app(void) UART_printf("R5F-CPU example application SDL_runMPUSelfTest: failure on line no. %d \n", __LINE__); testResult = -1; } - } + }*/ return(testResult); } /* Nothing past this point */ diff --git a/examples/cpu/main.c b/examples/cpu/main.c index da2f7be..9f318a8 100755 --- a/examples/cpu/main.c +++ b/examples/cpu/main.c @@ -106,9 +106,11 @@ int32_t SDL_ESM_applicationCallbackFunction(SDL_ESM_Inst esmInst, esmInst, esmIntrType, grpChannel, index, intSrc); UART_printf(" Take action \n"); - SDL_CCM_getErrorType(SDL_CCM_MCU_R5F0, intSrc, &monitorType); - SDL_CCM_clearError(SDL_CCM_MCU_R5F0, monitorType); - + SDL_CCM_getErrorType(SDL_CCM_R5F0, intSrc, &monitorType); + SDL_CCM_clearError(SDL_CCM_R5F0, monitorType); + /* Clear ESM registers. */ + SDL_ESM_disableIntr(SDL_ESM0_CFG_BASE, intSrc); + SDL_ESM_clrNError(SDL_ESM_INST_MAIN_ESM0); return retVal; } diff --git a/src/sdl/r5/sdl_ccm.c b/src/sdl/r5/sdl_ccm.c index 3be4efe..c695e14 100755 --- a/src/sdl/r5/sdl_ccm.c +++ b/src/sdl/r5/sdl_ccm.c @@ -62,15 +62,15 @@ #define SDL_ESM_CCM_STAT_ERR_INT 5 /**< CCM Interrupt source self test or split mode interrupt */ -/* Event BitMap for ECC ESM callback for MCU */ +/* Event BitMap for ECC ESM callback for Main Domain */ uint32_t SDL_CCM_eventBitMap[SDL_ESM_MAX_EVENT_MAP_NUM_WORDS] = { - 0x00000000u, 0x00000000u, 0x00000000u, 0x0000001Fu, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, + 0x000001F0u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, 0x00000000u, }; @@ -263,8 +263,8 @@ static int32_t SDL_CCM_ESM_callBackFunction (SDL_ESM_Inst instance, SDL_ESM_IntT /* Check if it is self test related interrupt */ switch (intSrc) { - case SDL_ESM_MCU_R5_SELFTEST_ERR_INT: - case SDL_ESM_MCU_R5_CCM_STAT_ERR_INT: + case SDL_ESM_R5_SELFTEST_ERR_INT: + case SDL_ESM_R5_CCM_STAT_ERR_INT: /* These events can come for any of the CCM block. Read status register to see which self test */ retVal = SDL_CCM_CheckSelfTestErrorSource(&monitorType); if ( retVal != SDL_PASS) { @@ -397,8 +397,8 @@ int32_t SDL_CCM_init(SDL_CCM_Inst instance) if (retVal == SDL_PASS) { - /* Register error interrupt call back function with MCU ESM handler */ - retVal = SDL_ESM_registerCCMCallback(SDL_ESM_INST_MCU_ESM0, SDL_CCM_eventBitMap, + /* Register error interrupt call back function with MAIN ESM handler */ + retVal = SDL_ESM_registerCCMCallback(SDL_ESM_INST_MAIN_ESM0, SDL_CCM_eventBitMap, &SDL_CCM_ESM_callBackFunction, NULL); } @@ -774,7 +774,7 @@ int32_t SDL_CCM_getErrorType(SDL_CCM_Inst instance, uint32_t intSrc, SDL_CCM_Mon switch(intSrc) { - case SDL_ESM_MCU_R5_CPU_BUS_CMP_ERR: + case SDL_ESM_R5_CPU_BUS_CMP_ERR: { /* Read status register of CPU output compare block */ sdlResult = SDL_armR5ReadCCMRegister (SDL_CCM_baseAddress[instance], @@ -789,7 +789,7 @@ int32_t SDL_CCM_getErrorType(SDL_CCM_Inst instance, uint32_t intSrc, SDL_CCM_Mon } break; } - case SDL_ESM_MCU_R5_VIM_BUS_CMP_ERR_INT: + case SDL_ESM_R5_VIM_BUS_CMP_ERR_INT: { /* Read status register of VIM compare block */ sdlResult = SDL_armR5ReadCCMRegister (SDL_CCM_baseAddress[instance], @@ -804,7 +804,7 @@ int32_t SDL_CCM_getErrorType(SDL_CCM_Inst instance, uint32_t intSrc, SDL_CCM_Mon } break; } - case SDL_ESM_MCU_R5_INACTIVITY_ERR_INT: + case SDL_ESM_R5_INACTIVITY_ERR_INT: { /* Read status register of Inactivity monitor block */ sdlResult = SDL_armR5ReadCCMRegister (SDL_CCM_baseAddress[instance], diff --git a/src/sdl/sdl_esm_core.h b/src/sdl/sdl_esm_core.h index 6c6d2ba..0dc09fd 100644 --- a/src/sdl/sdl_esm_core.h +++ b/src/sdl/sdl_esm_core.h @@ -186,6 +186,13 @@ extern "C" { #define SDL_ESM_MCU_CBASS_ECC_AGGR_SEC_INT SDLR_MCU_ESM0_ESM_LVL_EVENT_MCUM_MCU_ECC_AGGR0_CORR_LEVEL_0 #define SDL_ESM_MCU_CBASS_ECC_AGGR_DED_INT SDLR_MCU_ESM0_ESM_LVL_EVENT_MCUM_MCU_ECC_AGGR0_UNCORR_LEVEL_0 +/*MAIN R5F CCM Events*/ +#define SDL_ESM_R5_SELFTEST_ERR_INT SDLR_ESM0_ESM_PLS_EVENT0_R5FSS0_COMMON0_SELFTEST_ERR_PULSE_0 +#define SDL_ESM_R5_CPU_BUS_CMP_ERR SDLR_ESM0_ESM_PLS_EVENT0_R5FSS0_COMMON0_COMPARE_ERR_PULSE_0 +#define SDL_ESM_R5_INACTIVITY_ERR_INT SDLR_ESM0_ESM_PLS_EVENT0_R5FSS0_COMMON0_BUS_MONITOR_ERR_PULSE_0 +#define SDL_ESM_R5_VIM_BUS_CMP_ERR_INT SDLR_ESM0_ESM_PLS_EVENT0_R5FSS0_COMMON0_VIM_COMPARE_ERR_PULSE_0 +#define SDL_ESM_R5_CCM_STAT_ERR_INT SDLR_ESM0_ESM_PLS_EVENT0_R5FSS0_CCM_COMPARE_STAT_PULSE_INTR_0 + #endif /* SOC_J784S4 */ #ifdef __cplusplus -- 2.34.1
2. This example must be tested when the Main R5F is running in lockstep mode. To enable lockstep mode on the Main R5F,
NOTE: In the above combined image command, Make sure you are writing the correct core number. It can be found at (..\PDK\ti\boot\sbl\soc\k3\sbl_slave_core_boot.h) Ex. #define MCU1_CPU0_ID (8U), here 8 is the core number for the mcu1_0 core and #define MCU2_SMP_ID (28U), here 28 is the core number for the mcu2_0 SMP core to enable lockstep.
Regards,
Josiitaa