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I am attempting to load U-Boot via Ethernet.
I have downloaded SDK 9.02.01.09 (March 2024) and have built the new binaries with the following config files:
I have also tried the patch "Add-support-for-Ethernet-Boot-on-SK-AM62.patch". Many of these changes were already found in the SDK source code.
tiboot3.bin is transferring to the target board, but the last packet is not getting acknowledged and tispl.bin and u-boot.img are not being loaded.
Am I building the tiboot3.bin incorrectly?
Hello Kyle,
Where did you obtain the "Add-support-for-Ethernet-Boot-on-SK-AM62.patch"?
Previously, I've seen this exact issue when tiboot3.bin was built using the default "am62x_evm_r5_ethboot_defconfig" in SDK 9.1. The fix was to build tiboot3.bin with a defconfig with the correct settings for ethboot which can be found in https://patchwork.ozlabs.org/project/uboot/list/?series=390216&archive=both&state=*. I currently do not know if these patches have been applied to SDK 9.2 but I will check and get back to you.
You may find this FAQ useful as well: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1328520/faq-how-to-boot-sk-am62b-sk-am62a-via-ethernet-and-flash-u-boot-and-linux-binaries-into-emmc-via-ethernet
-Daolin
The final packet is still not being acknowledged. I am, however, receiving something different on the console:
Previously, I was not using the top-level makefile (make u-boot) to build the u-boot binaries. I changed the config file within the Rules.mk file and built. The above resulted.
Hi Kyle,
The fact that you are seeing "U-Boot SPL..." indicates that tiboot3.bin, the first bootloader loaded via R5 has been successfully transferred. I think that the tispl.bin might not be transferred correctly or the "am62x_evm_a53_defconfig" just doesn't have the correct configuration for ethboot to build tispl.bin for ethboot.
Could you check if your "am62x_evm_a53_defconfig" has the same configuration as https://patchwork.ozlabs.org/project/uboot/patch/20240112064759.1801600-10-s-vadapalli@ti.com/ ?
Could you also check what Wireshark shows when you see those messages on the console?
-Daolin
Yes, I have added all the statements found in the patch for am62x_evm_a53_defconfig. Where can I locate the source for this file instead of just the additions/subtractions? Perhaps I have too much configured in my defconfig.
Wireshark shows the same as the image found above. There's no acknowledgement of the last data block and I see no BOOTP request for the second file (tispl.bin).
Hi Kyle,
Can you clarify exactly what changes (if any) you made to the out of box u-boot files and what steps you took to get to the issue you see?
I will try to reproduce your issue on my setup first with building the u-boot binaries from the out of box SDK 9.2.
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Currently I'm also trying to get some clarity on whether these patches in https://patchwork.ozlabs.org/project/uboot/list/?series=390216&archive=both&state=* have been applied to 9.2. I was told that these are pending to be upstreamed to mainline U-boot and once accepted will be available in SDK 10.0
Upon initial diff between what is available for SDK 9.2 and the patch for am62x_evm_r5_ethboot_defconfig, there appears to be some differences which indicates to me that the patches have not been applied.
-Daolin
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts index 87f6bfccda..6cd1ad5fc3 100644 --- a/arch/arm/dts/k3-am625-r5-sk.dts +++ b/arch/arm/dts/k3-am625-r5-sk.dts @@ -19,4 +19,10 @@ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; bootph-pre-ram; }; + +}; + +&main_pktdma { + ti,sci = <&dm_tifs>; + bootph-all; }; diff --git a/arch/arm/mach-k3/am62x/clk-data.c b/arch/arm/mach-k3/am62x/clk-data.c index c0881778fe..f940feee65 100644 --- a/arch/arm/mach-k3/am62x/clk-data.c +++ b/arch/arm/mach-k3/am62x/clk-data.c @@ -158,45 +158,45 @@ static const struct clk_data clk_list[] = { CLK_FIXED_RATE("fss_ul_main_0_ospi_0_ospi_oclk_clk", 0, 0), CLK_DIV("hsdiv0_16fft_mcu_32khz_gen_0_hsdivout0_clk", "gluelogic_hfosc0_clkout", 0x4508030, 0, 7, 0, 0), CLK_FIXED_RATE("mshsi2c_main_0_porscl", 0, 0), - CLK_PLL("pllfracf_ssmod_16fft_main_0_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x680000, 0), - CLK_DIV("pllfracf_ssmod_16fft_main_0_foutpostdiv_clk_subdiv", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), - CLK_DIV("pllfracf_ssmod_16fft_main_0_foutpostdiv_clk", "pllfracf_ssmod_16fft_main_0_foutpostdiv_clk_subdiv", 0x680038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), - CLK_PLL("pllfracf_ssmod_16fft_main_1_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x681000, 0), - CLK_DIV("pllfracf_ssmod_16fft_main_1_foutpostdiv_clk_subdiv", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), - CLK_DIV("pllfracf_ssmod_16fft_main_1_foutpostdiv_clk", "pllfracf_ssmod_16fft_main_1_foutpostdiv_clk_subdiv", 0x681038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), - CLK_PLL("pllfracf_ssmod_16fft_main_12_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x68c000, 0), - CLK_PLL("pllfracf_ssmod_16fft_main_15_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x68f000, 0), - CLK_PLL("pllfracf_ssmod_16fft_main_2_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x682000, 0), - CLK_DIV("pllfracf_ssmod_16fft_main_2_foutpostdiv_clk_subdiv", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), - CLK_DIV("pllfracf_ssmod_16fft_main_2_foutpostdiv_clk", "pllfracf_ssmod_16fft_main_2_foutpostdiv_clk_subdiv", 0x682038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), - CLK_PLL("pllfracf_ssmod_16fft_main_8_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x688000, 0), - CLK_PLL("pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x4040000, 0), - CLK_DIV("postdiv1_16fft_main_1_hsdivout5_clk", "pllfracf_ssmod_16fft_main_1_foutpostdiv_clk", 0x681094, 0, 7, 0, 0), - CLK_DIV("postdiv4_16ff_main_0_hsdivout5_clk", "pllfracf_ssmod_16fft_main_0_foutpostdiv_clk", 0x680094, 0, 7, 0, 0), - CLK_DIV("postdiv4_16ff_main_0_hsdivout6_clk", "pllfracf_ssmod_16fft_main_0_foutpostdiv_clk", 0x680098, 0, 7, 0, 0), - CLK_DIV("postdiv4_16ff_main_0_hsdivout8_clk", "pllfracf_ssmod_16fft_main_0_foutpostdiv_clk", 0x6800a0, 0, 7, 0, 0), - CLK_DIV("postdiv4_16ff_main_2_hsdivout5_clk", "pllfracf_ssmod_16fft_main_2_foutpostdiv_clk", 0x682094, 0, 7, 0, 0), - CLK_DIV("postdiv4_16ff_main_2_hsdivout8_clk", "pllfracf_ssmod_16fft_main_2_foutpostdiv_clk", 0x6820a0, 0, 7, 0, 0), - CLK_DIV("postdiv4_16ff_main_2_hsdivout9_clk", "pllfracf_ssmod_16fft_main_2_foutpostdiv_clk", 0x6820a4, 0, 7, 0, 0), + CLK_PLL("pllfracf2_ssmod_16fft_main_0_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x680000, 0), + CLK_DIV("pllfracf2_ssmod_16fft_main_0_foutpostdiv_clk_subdiv", "pllfracf2_ssmod_16fft_main_0_foutvcop_clk", 0x680038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_DIV("pllfracf2_ssmod_16fft_main_0_foutpostdiv_clk", "pllfracf2_ssmod_16fft_main_0_foutpostdiv_clk_subdiv", 0x680038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_PLL_DEFFREQ("pllfracf2_ssmod_16fft_main_1_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x681000, 0, 1920000000), + CLK_DIV("pllfracf2_ssmod_16fft_main_1_foutpostdiv_clk_subdiv", "pllfracf2_ssmod_16fft_main_1_foutvcop_clk", 0x681038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_DIV("pllfracf2_ssmod_16fft_main_1_foutpostdiv_clk", "pllfracf2_ssmod_16fft_main_1_foutpostdiv_clk_subdiv", 0x681038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_PLL("pllfracf2_ssmod_16fft_main_12_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x68c000, 0), + CLK_PLL("pllfracf2_ssmod_16fft_main_15_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x68f000, 0), + CLK_PLL("pllfracf2_ssmod_16fft_main_2_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x682000, 0), + CLK_DIV("pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk_subdiv", "pllfracf2_ssmod_16fft_main_2_foutvcop_clk", 0x682038, 16, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_DIV("pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk", "pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk_subdiv", 0x682038, 24, 3, 0, CLK_DIVIDER_ONE_BASED), + CLK_PLL("pllfracf2_ssmod_16fft_main_8_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x688000, 0), + CLK_PLL("pllfracf2_ssmod_16fft_mcu_0_foutvcop_clk", "gluelogic_hfosc0_clkout", 0x4040000, 0), + CLK_DIV("postdiv1_16fft_main_1_hsdivout5_clk", "pllfracf2_ssmod_16fft_main_1_foutpostdiv_clk", 0x681094, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_0_hsdivout5_clk", "pllfracf2_ssmod_16fft_main_0_foutpostdiv_clk", 0x680094, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_0_hsdivout6_clk", "pllfracf2_ssmod_16fft_main_0_foutpostdiv_clk", 0x680098, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_0_hsdivout8_clk", "pllfracf2_ssmod_16fft_main_0_foutpostdiv_clk", 0x6800a0, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_2_hsdivout5_clk", "pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk", 0x682094, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_2_hsdivout8_clk", "pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk", 0x6820a0, 0, 7, 0, 0), + CLK_DIV("postdiv4_16ff_main_2_hsdivout9_clk", "pllfracf2_ssmod_16fft_main_2_foutpostdiv_clk", 0x6820a4, 0, 7, 0, 0), CLK_MUX("main_emmcsd0_io_clklb_sel_out0", main_emmcsd0_io_clklb_sel_out0_parents, 2, 0x108160, 16, 1, 0), CLK_MUX("main_emmcsd1_io_clklb_sel_out0", main_emmcsd1_io_clklb_sel_out0_parents, 2, 0x108168, 16, 1, 0), CLK_MUX("main_ospi_loopback_clk_sel_out0", main_ospi_loopback_clk_sel_out0_parents, 2, 0x108500, 4, 1, 0), CLK_MUX("main_usb0_refclk_sel_out0", main_usb0_refclk_sel_out0_parents, 2, 0x43008190, 0, 1, 0), CLK_MUX("main_usb1_refclk_sel_out0", main_usb1_refclk_sel_out0_parents, 2, 0x43008194, 0, 1, 0), - CLK_DIV("hsdiv0_16fft_main_12_hsdivout0_clk", "pllfracf_ssmod_16fft_main_12_foutvcop_clk", 0x68c080, 0, 7, 0, 0), - CLK_DIV("hsdiv0_16fft_main_8_hsdivout0_clk", "pllfracf_ssmod_16fft_main_8_foutvcop_clk", 0x688080, 0, 7, 0, 0), - CLK_DIV("hsdiv1_16fft_main_15_hsdivout0_clk", "pllfracf_ssmod_16fft_main_15_foutvcop_clk", 0x68f080, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_main_0_hsdivout0_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680080, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_main_0_hsdivout1_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680084, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_main_0_hsdivout2_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680088, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_main_0_hsdivout3_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x68008c, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_main_0_hsdivout4_clk", "pllfracf_ssmod_16fft_main_0_foutvcop_clk", 0x680090, 0, 7, 0, 0), - CLK_DIV_DEFFREQ("hsdiv4_16fft_main_1_hsdivout0_clk", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681080, 0, 7, 0, 0, 192000000), - CLK_DIV("hsdiv4_16fft_main_1_hsdivout1_clk", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681084, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_main_1_hsdivout2_clk", "pllfracf_ssmod_16fft_main_1_foutvcop_clk", 0x681088, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_main_2_hsdivout1_clk", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682084, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_main_2_hsdivout2_clk", "pllfracf_ssmod_16fft_main_2_foutvcop_clk", 0x682088, 0, 7, 0, 0), - CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout0_clk", "pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040080, 0, 7, 0, 0), + CLK_DIV("hsdiv0_16fft_main_12_hsdivout0_clk", "pllfracf2_ssmod_16fft_main_12_foutvcop_clk", 0x68c080, 0, 7, 0, 0), + CLK_DIV("hsdiv0_16fft_main_8_hsdivout0_clk", "pllfracf2_ssmod_16fft_main_8_foutvcop_clk", 0x688080, 0, 7, 0, 0), + CLK_DIV("hsdiv1_16fft_main_15_hsdivout0_clk", "pllfracf2_ssmod_16fft_main_15_foutvcop_clk", 0x68f080, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout0_clk", "pllfracf2_ssmod_16fft_main_0_foutvcop_clk", 0x680080, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout1_clk", "pllfracf2_ssmod_16fft_main_0_foutvcop_clk", 0x680084, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout2_clk", "pllfracf2_ssmod_16fft_main_0_foutvcop_clk", 0x680088, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout3_clk", "pllfracf2_ssmod_16fft_main_0_foutvcop_clk", 0x68008c, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_0_hsdivout4_clk", "pllfracf2_ssmod_16fft_main_0_foutvcop_clk", 0x680090, 0, 7, 0, 0), + CLK_DIV_DEFFREQ("hsdiv4_16fft_main_1_hsdivout0_clk", "pllfracf2_ssmod_16fft_main_1_foutvcop_clk", 0x681080, 0, 7, 0, 0, 192000000), + CLK_DIV("hsdiv4_16fft_main_1_hsdivout1_clk", "pllfracf2_ssmod_16fft_main_1_foutvcop_clk", 0x681084, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_1_hsdivout2_clk", "pllfracf2_ssmod_16fft_main_1_foutvcop_clk", 0x681088, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_2_hsdivout1_clk", "pllfracf2_ssmod_16fft_main_2_foutvcop_clk", 0x682084, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_main_2_hsdivout2_clk", "pllfracf2_ssmod_16fft_main_2_foutvcop_clk", 0x682088, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout0_clk", "pllfracf2_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040080, 0, 7, 0, 0), CLK_MUX_PLLCTRL("sam62_pll_ctrl_wrap_main_0_sysclkout_clk", sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents, 2, 0x410000, 0), CLK_DIV("sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk", "sam62_pll_ctrl_wrap_main_0_sysclkout_clk", 0x410118, 0, 5, 0, 0), CLK_MUX_PLLCTRL("sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents, 2, 0x4020000, 0), @@ -212,7 +212,7 @@ static const struct clk_data clk_list[] = { CLK_MUX("wkup_clkout_sel_out0", wkup_clkout_sel_out0_parents, 8, 0x43008020, 0, 3, 0), CLK_MUX("wkup_clksel_out0", wkup_clksel_out0_parents, 2, 0x43008010, 0, 1, 0), CLK_MUX("main_usart0_fclk_sel_out0", main_usart0_fclk_sel_out0_parents, 2, 0x108280, 0, 1, 0), - CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout1_clk", "pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040084, 0, 7, 0, 0), + CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout1_clk", "pllfracf2_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040084, 0, 7, 0, 0), CLK_FIXED_RATE("mshsi2c_wkup_0_porscl", 0, 0), CLK_DIV("sam62_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "sam62_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0), CLK_DIV("sam62_pll_ctrl_wrap_mcu_0_chip_div24_clk_clk", "sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk", 0x402011c, 0, 5, 0, 0), diff --git a/configs/am62x_evm_r5_ethboot_defconfig b/configs/am62x_evm_r5_ethboot_defconfig index 701e9db392..dceb815e70 100644 --- a/configs/am62x_evm_r5_ethboot_defconfig +++ b/configs/am62x_evm_r5_ethboot_defconfig @@ -1,7 +1,8 @@ +CONFIG_SYSCON=y CONFIG_ARM=y CONFIG_ARCH_K3=y -CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x9000 +CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 @@ -10,7 +11,6 @@ CONFIG_TARGET_AM625_R5_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk" CONFIG_SPL_TEXT_BASE=0x43c00000 @@ -39,10 +39,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y -CONFIG_SYS_SPL_MALLOC=y -CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y -CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x84000000 -CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 @@ -72,13 +68,12 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_MMC_ENV_PART=1 CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y @@ -92,9 +87,6 @@ CONFIG_DA8XX_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ADMA=y -CONFIG_MMC_SDHCI_AM654=y CONFIG_PHY_TI_DP83867=y CONFIG_TI_AM65_CPSW_NUSS=y CONFIG_PINCTRL=y
Ok, now I have uploaded my diffs. It's just a patch file.
One thing to note, I am using the tiboot3-am62x-gp-evm.bin file.
Hi Kyle,
Did you see this error when "make u-boot" from the SDK top level directory after changing the following section of Rules.mk from the out of the box SDK (no patches applied)?
# u-boot machine configs for A53 and R5 UBOOT_MACHINE=am62x_evm_a53_defconfig UBOOT_MACHINE_R5=am62x_evm_r5_ethboot_defconfig
/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/k3r5-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-oe-eabi/arm-oe-eabi-ld.bfd: drivers/net/ti/am65-cpsw-nuss.o: in function `am65_cpsw_am654_get_efuse_macid': /home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674/drivers/net/ti/am65-cpsw-nuss.c:550: undefined reference to `syscon_regmap_lookup_by_phandle' make[3]: *** [/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674/scripts/Makefile.spl:527: spl/u-boot-spl] Error 1 make[2]: *** [/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674/Makefile:2044: spl/u-boot-spl] Error 2 make[2]: Leaving directory '/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/u-boot-build/r5' make[1]: *** [Makefile:177: sub-make] Error 2 make[1]: Leaving directory '/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674' make: *** [makerules/Makefile_u-boot:28: u-boot-r5] Error 2
-Daolin
One thing to note, I am using the tiboot3-am62x-gp-evm.bin file.
You indicated using "SK-AM62" which is typically a GP device. Can you verify that your device is GP?
Yes. I then added the following 2 items to the ethboot defconfig file:
It then built properly.
I was able to reproduce the following issue you saw in your console if I only changed the am62x_evm_ethboot_defconfig to the version in the patchset I shared previously.
U-Boot SPL 2023.04-dirty (Apr 17 2024 - 16:45:57 -0500) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)') SPL initial stack usage: 13408 bytes Trying to boot from eth device Loading Environment from nowhere... OK No ethernet found. No Ethernet devices found SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ###
I noticed there are several other files in the patchset I sent such as https://patchwork.ozlabs.org/project/uboot/patch/20240112064759.1801600-8-s-vadapalli@ti.com/ (arch/arm/mach-k3/am625_init) which doesn't appear to be changed on your setup (looking at your patch file).
Could you apply those changes as well and see what happens?
-Daolin
I have applied all these changes already and receive the same results. Many of these changes already existed in the downloaded SDK.
Can you try applying these changes (in ti-u-boot.patch) to the board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674 directory from the top level SDK?
By building with this ti-u-boot directory you should be able to boot into U-boot prompt with the resulting u-boot binaries.
This is what worked for me.
U-Boot SPL 2023.04-29979-gf0af5208e0-dirty (Apr 17 2024 - 17:22:04 -0500) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)') SPL initial stack usage: 13384 bytes Trying to boot from eth device eth0: ethernet@8000000port@1 ethernet@8000000port@1 Waiting for PHY auto negotiation to complete....... done link up on port 1, speed 1000, full duplex BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 DHCP client bound to address 172.168.1.170 (1258 ms) Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'tispl.bin'. Load address: 0x82000000 Loading: ################################################################# ################################################################# ################################################################# #################################### 0 Bytes 5.1 MiB/s done Bytes transferred = 1182655 (120bbf hex) udma_stop_mem2dev: peer not stopped TIMEOUT ! Authentication passed Authentication passed Authentication passed init_env from device 4 not supported! Authentication passed Authentication passed Starting ATF on ARM64 core... NOTICE: BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty NOTICE: BL31: Built : 16:09:05, Feb 9 2024 U-Boot SPL 2023.04-29979-gf0af5208e0-dirty (Apr 17 2024 - 17:22:15 -0500) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)') SPL initial stack usage: 1856 bytes MMC: no card present ** Bad device specification mmc 1 ** Couldn't find partition mmc 1:1 Error: could not access storage. Trying to boot from eth device Loading Environment from nowhere... OK eth0: ethernet@8000000port@1 ethernet@8000000port@1 Waiting for PHY auto negotiation to complete....... done link up on port 1, speed 1000, full duplex BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 172.168.1.170 (1758 ms) Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'u-boot.img'. Load address: 0x82000000 Loading: ################################################################# ################################################################# ########################################################### 0 Bytes 183.6 KiB/s done Bytes transferred = 966155 (ebe0b hex) Authentication passed Authentication passed U-Boot 2023.04-dirty (Apr 17 2024 - 16:46:09 -0500) SoC: AM62X SR1.0 HS-FS Model: Texas Instruments AM625 SK EEPROM not available at 80, trying to read at 81 Board: AM62B-SKEVM rev A DRAM: 2 GiB Core: 72 devices, 32 uclasses, devicetree: separate MMC: mmc@fa10000: 0, mmc@fa00000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Net: eth0: ethernet@8000000port@1 Hit any key to stop autoboot: 0
As an additional question, what are you planning on using ethernet boot for - development or production purposes? Please keep in mind there is an errata on AM62x devices that make it unsuitable for ethernet boot for production purposes.
If you are wondering why the patchset I previously pointed to are different from what I provide now.. good question, I'm currently chasing why this is the case with the internal team.
-Daolin
So far I have been unable to apply this patch. How was this patch generated? I am using git but have also tried the Linux patch command.
SUCCESS!! I painstakingly manually applied the patch and the board is successfully booting into U-Boot.
I was tasked to test a board that mistakenly had the SD card interface removed, so I needed a way to boot via Ethernet. We will NOT be using this for production purposes.
I am curious as to what you may find regarding why this patch was needed and the previous one did not work.
I would also like to know why this patch could not be automatically applied in my environment. How was this patch created?
Apologies for the delayed response.
It was not a git patch, it was simply the output of "diff -r" between the entire u-boot directory that worked and the out of the box directory. This is because I was not using git in my environment.
I was trying to track which was the last commit in u-boot that last allowed ethboot to work and found ea155ff62af9f25a3295bd19ee869d97d2eb0299 to be the likely commit to reset to. However, I wanted to test before sharing that with you in case it didn't work. You may give resetting to that commit a try and see if ethboot also works.
My guess is that there are several changes since ea155ff62af9f25a3295bd19ee869d97d2eb0299 to the head of the ti-u-boot for 9.2 tag including some changes to defconfig files for ethboot that caused a regression bug.
Thanks for clarifying your intentions with ethernet boot.
-Daolin
Update: no need to revert back to that commit... it resulted in a build error
The original diff patch file I gave you was based on a colleague's branch of the ti-u-boot directory from git.ti.com which was the working method. The commit I found was the last commit that supposedly merged the colleague's branch to the main ti-u-boot branch.
I do not know what specifically in the colleague's branch that allowed booting via ethernet to work. But I will try to look into it.
The reason why I did not provide a git patch is simple... I did not know how to properly create one. I've since then learned: ti-u-boot-2023.04-ethernet-boot-patches-for-09.01.00.008.tar(1).gz
This is a tarball of all the patches from SDK 9.1 onwards to enable ethernet boot to work.
-Daolin
Update #2:
Instead of applying ti-u-boot-2023.04-ethernet-boot-patches-for-09.01.00.008.tar(1).gz to SDK 9.1, directly copying the following 2 files into the out of box SDK 9.2 also enables ethernet boot to work
1. <u-boot-directory>/drivers/net/ti/am65-cpsw-nuss.c
// SPDX-License-Identifier: GPL-2.0+ /* * Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver * * Copyright (C) 2019, Texas Instruments, Incorporated * */ #include <common.h> #include <malloc.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/processor.h> #include <clk.h> #include <dm.h> #include <dm/device_compat.h> #include <dm/lists.h> #include <dm/pinctrl.h> #include <dma-uclass.h> #include <dm/of_access.h> #include <miiphy.h> #include <net.h> #include <phy.h> #include <power-domain.h> #include <soc.h> #include <linux/bitops.h> #include <linux/soc/ti/ti-udma.h> #include "cpsw_mdio.h" #define AM65_CPSW_CPSWNU_MAX_PORTS 9 #define AM65_CPSW_SS_BASE 0x0 #define AM65_CPSW_SGMII_BASE 0x100 #define AM65_CPSW_MDIO_BASE 0xf00 #define AM65_CPSW_XGMII_BASE 0x2100 #define AM65_CPSW_CPSW_NU_BASE 0x20000 #define AM65_CPSW_CPSW_NU_ALE_BASE 0x1e000 #define AM65_CPSW_CPSW_NU_PORTS_OFFSET 0x1000 #define AM65_CPSW_CPSW_NU_PORT_MACSL_OFFSET 0x330 #define AM65_CPSW_MDIO_BUS_FREQ_DEF 1000000 #define AM65_CPSW_CTL_REG 0x4 #define AM65_CPSW_STAT_PORT_EN_REG 0x14 #define AM65_CPSW_PTYPE_REG 0x18 #define AM65_CPSW_CTL_REG_P0_ENABLE BIT(2) #define AM65_CPSW_CTL_REG_P0_TX_CRC_REMOVE BIT(13) #define AM65_CPSW_CTL_REG_P0_RX_PAD BIT(14) #define AM65_CPSW_P0_FLOW_ID_REG 0x8 #define AM65_CPSW_PN_RX_MAXLEN_REG 0x24 #define AM65_CPSW_PN_REG_SA_L 0x308 #define AM65_CPSW_PN_REG_SA_H 0x30c #define AM65_CPSW_ALE_CTL_REG 0x8 #define AM65_CPSW_ALE_CTL_REG_ENABLE BIT(31) #define AM65_CPSW_ALE_CTL_REG_RESET_TBL BIT(30) #define AM65_CPSW_ALE_CTL_REG_BYPASS BIT(4) #define AM65_CPSW_ALE_PN_CTL_REG(x) (0x40 + (x) * 4) #define AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD 0x3 #define AM65_CPSW_ALE_PN_CTL_REG_MAC_ONLY BIT(11) #define AM65_CPSW_ALE_THREADMAPDEF_REG 0x134 #define AM65_CPSW_ALE_DEFTHREAD_EN BIT(15) #define AM65_CPSW_MACSL_CTL_REG 0x0 #define AM65_CPSW_MACSL_CTL_REG_IFCTL_A BIT(15) #define AM65_CPSW_MACSL_CTL_EXT_EN BIT(18) #define AM65_CPSW_MACSL_CTL_REG_GIG BIT(7) #define AM65_CPSW_MACSL_CTL_REG_GMII_EN BIT(5) #define AM65_CPSW_MACSL_CTL_REG_LOOPBACK BIT(1) #define AM65_CPSW_MACSL_CTL_REG_FULL_DUPLEX BIT(0) #define AM65_CPSW_MACSL_RESET_REG 0x8 #define AM65_CPSW_MACSL_RESET_REG_RESET BIT(0) #define AM65_CPSW_MACSL_STATUS_REG 0x4 #define AM65_CPSW_MACSL_RESET_REG_PN_IDLE BIT(31) #define AM65_CPSW_MACSL_RESET_REG_PN_E_IDLE BIT(30) #define AM65_CPSW_MACSL_RESET_REG_PN_P_IDLE BIT(29) #define AM65_CPSW_MACSL_RESET_REG_PN_TX_IDLE BIT(28) #define AM65_CPSW_MACSL_RESET_REG_IDLE_MASK \ (AM65_CPSW_MACSL_RESET_REG_PN_IDLE | \ AM65_CPSW_MACSL_RESET_REG_PN_E_IDLE | \ AM65_CPSW_MACSL_RESET_REG_PN_P_IDLE | \ AM65_CPSW_MACSL_RESET_REG_PN_TX_IDLE) #define AM65_CPSW_CPPI_PKT_TYPE 0x7 struct am65_cpsw_port { fdt_addr_t port_base; fdt_addr_t macsl_base; bool disabled; u32 mac_control; }; struct am65_cpsw_common { struct udevice *dev; fdt_addr_t ss_base; fdt_addr_t cpsw_base; fdt_addr_t mdio_base; fdt_addr_t ale_base; fdt_addr_t gmii_sel; fdt_addr_t mac_efuse; struct clk fclk; struct power_domain pwrdmn; u32 port_num; struct am65_cpsw_port ports[AM65_CPSW_CPSWNU_MAX_PORTS]; struct mii_dev *bus; u32 bus_freq; struct dma dma_tx; struct dma dma_rx; u32 rx_next; u32 rx_pend; bool started; }; struct am65_cpsw_priv { struct udevice *dev; struct am65_cpsw_common *cpsw_common; u32 port_id; struct phy_device *phydev; bool has_phy; ofnode phy_node; u32 phy_addr; bool mdio_manual_mode; }; #ifdef PKTSIZE_ALIGN #define UDMA_RX_BUF_SIZE PKTSIZE_ALIGN #else #define UDMA_RX_BUF_SIZE ALIGN(1522, ARCH_DMA_MINALIGN) #endif #ifdef PKTBUFSRX #define UDMA_RX_DESC_NUM PKTBUFSRX #else #define UDMA_RX_DESC_NUM 4 #endif #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \ ((mac)[2] << 16) | ((mac)[3] << 24)) #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8)) static void am65_cpsw_set_sl_mac(struct am65_cpsw_port *slave, unsigned char *addr) { writel(mac_hi(addr), slave->port_base + AM65_CPSW_PN_REG_SA_H); writel(mac_lo(addr), slave->port_base + AM65_CPSW_PN_REG_SA_L); } int am65_cpsw_macsl_reset(struct am65_cpsw_port *slave) { u32 i = 100; /* Set the soft reset bit */ writel(AM65_CPSW_MACSL_RESET_REG_RESET, slave->macsl_base + AM65_CPSW_MACSL_RESET_REG); while ((readl(slave->macsl_base + AM65_CPSW_MACSL_RESET_REG) & AM65_CPSW_MACSL_RESET_REG_RESET) && i--) cpu_relax(); /* Timeout on the reset */ return i; } static int am65_cpsw_macsl_wait_for_idle(struct am65_cpsw_port *slave) { u32 i = 100; while ((readl(slave->macsl_base + AM65_CPSW_MACSL_STATUS_REG) & AM65_CPSW_MACSL_RESET_REG_IDLE_MASK) && i--) cpu_relax(); return i; } static int am65_cpsw_update_link(struct am65_cpsw_priv *priv) { struct am65_cpsw_common *common = priv->cpsw_common; struct am65_cpsw_port *port = &common->ports[priv->port_id]; struct phy_device *phy = priv->phydev; u32 mac_control = 0; if (phy->link) { /* link up */ mac_control = /*AM65_CPSW_MACSL_CTL_REG_LOOPBACK |*/ AM65_CPSW_MACSL_CTL_REG_GMII_EN; if (phy->speed == 1000) mac_control |= AM65_CPSW_MACSL_CTL_REG_GIG; if (phy->speed == 10 && phy_interface_is_rgmii(phy)) /* Can be used with in band mode only */ mac_control |= AM65_CPSW_MACSL_CTL_EXT_EN; if (phy->duplex == DUPLEX_FULL) mac_control |= AM65_CPSW_MACSL_CTL_REG_FULL_DUPLEX; if (phy->speed == 100) mac_control |= AM65_CPSW_MACSL_CTL_REG_IFCTL_A; } if (mac_control == port->mac_control) goto out; if (mac_control) { printf("link up on port %d, speed %d, %s duplex\n", priv->port_id, phy->speed, (phy->duplex == DUPLEX_FULL) ? "full" : "half"); } else { printf("link down on port %d\n", priv->port_id); } writel(mac_control, port->macsl_base + AM65_CPSW_MACSL_CTL_REG); port->mac_control = mac_control; out: return phy->link; } #define AM65_GMII_SEL_PORT_OFFS(x) (0x4 * ((x) - 1)) #define AM65_GMII_SEL_MODE_MII 0 #define AM65_GMII_SEL_MODE_RMII 1 #define AM65_GMII_SEL_MODE_RGMII 2 #define AM65_GMII_SEL_RGMII_IDMODE BIT(4) static void am65_cpsw_gmii_sel_k3(struct am65_cpsw_priv *priv, phy_interface_t phy_mode, int slave) { struct am65_cpsw_common *common = priv->cpsw_common; fdt_addr_t gmii_sel = common->gmii_sel + AM65_GMII_SEL_PORT_OFFS(slave); u32 reg; u32 mode = 0; bool rgmii_id = false; reg = readl(gmii_sel); dev_dbg(common->dev, "old gmii_sel: %08x\n", reg); switch (phy_mode) { case PHY_INTERFACE_MODE_RMII: mode = AM65_GMII_SEL_MODE_RMII; break; case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_RXID: mode = AM65_GMII_SEL_MODE_RGMII; break; case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_TXID: mode = AM65_GMII_SEL_MODE_RGMII; rgmii_id = true; break; default: dev_warn(common->dev, "Unsupported PHY mode: %u. Defaulting to MII.\n", phy_mode); /* fallthrough */ case PHY_INTERFACE_MODE_MII: mode = AM65_GMII_SEL_MODE_MII; break; }; if (rgmii_id) mode |= AM65_GMII_SEL_RGMII_IDMODE; reg = mode; dev_dbg(common->dev, "gmii_sel PHY mode: %u, new gmii_sel: %08x\n", phy_mode, reg); writel(reg, gmii_sel); reg = readl(gmii_sel); if (reg != mode) dev_err(common->dev, "gmii_sel PHY mode NOT SET!: requested: %08x, gmii_sel: %08x\n", mode, reg); } static int am65_cpsw_start(struct udevice *dev) { struct eth_pdata *pdata = dev_get_plat(dev); struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *common = priv->cpsw_common; struct am65_cpsw_port *port = &common->ports[priv->port_id]; struct am65_cpsw_port *port0 = &common->ports[0]; struct ti_udma_drv_chan_cfg_data *dma_rx_cfg_data; int ret, i; ret = power_domain_on(&common->pwrdmn); if (ret) { dev_err(dev, "power_domain_on() failed %d\n", ret); goto out; } ret = clk_enable(&common->fclk); if (ret) { dev_err(dev, "clk enabled failed %d\n", ret); goto err_off_pwrdm; } common->rx_next = 0; common->rx_pend = 0; ret = dma_get_by_name(common->dev, "tx0", &common->dma_tx); if (ret) { dev_err(dev, "TX dma get failed %d\n", ret); goto err_off_clk; } ret = dma_get_by_name(common->dev, "rx", &common->dma_rx); if (ret) { dev_err(dev, "RX dma get failed %d\n", ret); goto err_free_tx; } for (i = 0; i < UDMA_RX_DESC_NUM; i++) { ret = dma_prepare_rcv_buf(&common->dma_rx, net_rx_packets[i], UDMA_RX_BUF_SIZE); if (ret) { dev_err(dev, "RX dma add buf failed %d\n", ret); goto err_free_tx; } } ret = dma_enable(&common->dma_tx); if (ret) { dev_err(dev, "TX dma_enable failed %d\n", ret); goto err_free_rx; } ret = dma_enable(&common->dma_rx); if (ret) { dev_err(dev, "RX dma_enable failed %d\n", ret); goto err_dis_tx; } /* Control register */ writel(AM65_CPSW_CTL_REG_P0_ENABLE | AM65_CPSW_CTL_REG_P0_TX_CRC_REMOVE | AM65_CPSW_CTL_REG_P0_RX_PAD, common->cpsw_base + AM65_CPSW_CTL_REG); /* disable priority elevation */ writel(0, common->cpsw_base + AM65_CPSW_PTYPE_REG); /* enable statistics */ writel(BIT(0) | BIT(priv->port_id), common->cpsw_base + AM65_CPSW_STAT_PORT_EN_REG); /* Port 0 length register */ writel(PKTSIZE_ALIGN, port0->port_base + AM65_CPSW_PN_RX_MAXLEN_REG); /* set base flow_id */ dma_get_cfg(&common->dma_rx, 0, (void **)&dma_rx_cfg_data); writel(dma_rx_cfg_data->flow_id_base, port0->port_base + AM65_CPSW_P0_FLOW_ID_REG); dev_info(dev, "K3 CPSW: rflow_id_base: %u\n", dma_rx_cfg_data->flow_id_base); /* Reset and enable the ALE */ writel(AM65_CPSW_ALE_CTL_REG_ENABLE | AM65_CPSW_ALE_CTL_REG_RESET_TBL | AM65_CPSW_ALE_CTL_REG_BYPASS, common->ale_base + AM65_CPSW_ALE_CTL_REG); /* port 0 put into forward mode */ writel(AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD, common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(0)); writel(AM65_CPSW_ALE_DEFTHREAD_EN, common->ale_base + AM65_CPSW_ALE_THREADMAPDEF_REG); /* PORT x configuration */ /* Port x Max length register */ writel(PKTSIZE_ALIGN, port->port_base + AM65_CPSW_PN_RX_MAXLEN_REG); /* Port x set mac */ am65_cpsw_set_sl_mac(port, pdata->enetaddr); /* Port x ALE: mac_only, Forwarding */ writel(AM65_CPSW_ALE_PN_CTL_REG_MAC_ONLY | AM65_CPSW_ALE_PN_CTL_REG_MODE_FORWARD, common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(priv->port_id)); port->mac_control = 0; if (!am65_cpsw_macsl_reset(port)) { dev_err(dev, "mac_sl reset failed\n"); ret = -EFAULT; goto err_dis_rx; } ret = phy_startup(priv->phydev); if (ret) { dev_err(dev, "phy_startup failed\n"); goto err_dis_rx; } ret = am65_cpsw_update_link(priv); if (!ret) { ret = -ENODEV; goto err_phy_shutdown; } common->started = true; return 0; err_phy_shutdown: phy_shutdown(priv->phydev); err_dis_rx: /* disable ports */ writel(0, common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(priv->port_id)); writel(0, common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(0)); if (!am65_cpsw_macsl_wait_for_idle(port)) dev_err(dev, "mac_sl idle timeout\n"); writel(0, port->macsl_base + AM65_CPSW_MACSL_CTL_REG); writel(0, common->ale_base + AM65_CPSW_ALE_CTL_REG); writel(0, common->cpsw_base + AM65_CPSW_CTL_REG); dma_disable(&common->dma_rx); err_dis_tx: dma_disable(&common->dma_tx); err_free_rx: dma_free(&common->dma_rx); err_free_tx: dma_free(&common->dma_tx); err_off_clk: clk_disable(&common->fclk); err_off_pwrdm: power_domain_off(&common->pwrdmn); out: dev_err(dev, "%s end error\n", __func__); return ret; } static int am65_cpsw_send(struct udevice *dev, void *packet, int length) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *common = priv->cpsw_common; struct ti_udma_drv_packet_data packet_data; int ret; packet_data.pkt_type = AM65_CPSW_CPPI_PKT_TYPE; packet_data.dest_tag = priv->port_id; ret = dma_send(&common->dma_tx, packet, length, &packet_data); if (ret) { dev_err(dev, "TX dma_send failed %d\n", ret); return ret; } return 0; } static int am65_cpsw_recv(struct udevice *dev, int flags, uchar **packetp) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *common = priv->cpsw_common; /* try to receive a new packet */ return dma_receive(&common->dma_rx, (void **)packetp, NULL); } static int am65_cpsw_free_pkt(struct udevice *dev, uchar *packet, int length) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *common = priv->cpsw_common; int ret; if (length > 0) { u32 pkt = common->rx_next % UDMA_RX_DESC_NUM; ret = dma_prepare_rcv_buf(&common->dma_rx, net_rx_packets[pkt], UDMA_RX_BUF_SIZE); if (ret) dev_err(dev, "RX dma free_pkt failed %d\n", ret); common->rx_next++; } return 0; } static void am65_cpsw_stop(struct udevice *dev) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *common = priv->cpsw_common; struct am65_cpsw_port *port = &common->ports[priv->port_id]; if (!common->started) return; phy_shutdown(priv->phydev); writel(0, common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(priv->port_id)); writel(0, common->ale_base + AM65_CPSW_ALE_PN_CTL_REG(0)); if (!am65_cpsw_macsl_wait_for_idle(port)) dev_err(dev, "mac_sl idle timeout\n"); writel(0, port->macsl_base + AM65_CPSW_MACSL_CTL_REG); writel(0, common->ale_base + AM65_CPSW_ALE_CTL_REG); writel(0, common->cpsw_base + AM65_CPSW_CTL_REG); dma_disable(&common->dma_tx); dma_free(&common->dma_tx); dma_disable(&common->dma_rx); dma_free(&common->dma_rx); common->started = false; } static int am65_cpsw_read_rom_hwaddr(struct udevice *dev) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *common = priv->cpsw_common; struct eth_pdata *pdata = dev_get_plat(dev); u32 mac_hi, mac_lo; if (common->mac_efuse == FDT_ADDR_T_NONE) return -1; mac_lo = readl(common->mac_efuse); mac_hi = readl(common->mac_efuse + 4); pdata->enetaddr[0] = (mac_hi >> 8) & 0xff; pdata->enetaddr[1] = mac_hi & 0xff; pdata->enetaddr[2] = (mac_lo >> 24) & 0xff; pdata->enetaddr[3] = (mac_lo >> 16) & 0xff; pdata->enetaddr[4] = (mac_lo >> 8) & 0xff; pdata->enetaddr[5] = mac_lo & 0xff; return 0; } static const struct eth_ops am65_cpsw_ops = { .start = am65_cpsw_start, .send = am65_cpsw_send, .recv = am65_cpsw_recv, .free_pkt = am65_cpsw_free_pkt, .stop = am65_cpsw_stop, .read_rom_hwaddr = am65_cpsw_read_rom_hwaddr, }; static const struct soc_attr k3_mdio_soc_data[] = { { .family = "AM62X", .revision = "SR1.0" }, { .family = "AM64X", .revision = "SR1.0" }, { .family = "AM64X", .revision = "SR2.0" }, { .family = "AM65X", .revision = "SR1.0" }, { .family = "AM65X", .revision = "SR2.0" }, { .family = "J7200", .revision = "SR1.0" }, { .family = "J7200", .revision = "SR2.0" }, { .family = "J721E", .revision = "SR1.0" }, { .family = "J721E", .revision = "SR1.1" }, { .family = "J721S2", .revision = "SR1.0" }, { /* sentinel */ }, }; static ofnode am65_cpsw_find_mdio(ofnode parent) { ofnode node; ofnode_for_each_subnode(node, parent) if (ofnode_device_is_compatible(node, "ti,cpsw-mdio")) return node; return ofnode_null(); } static int am65_cpsw_mdio_setup(struct udevice *dev) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *cpsw_common = priv->cpsw_common; struct udevice *mdio_dev; ofnode mdio; int ret; mdio = am65_cpsw_find_mdio(dev_ofnode(cpsw_common->dev)); if (!ofnode_valid(mdio)) return 0; /* * The MDIO controller is represented in the DT binding by a * subnode of the MAC controller. * * We don't have a DM driver for the MDIO device yet, and thus any * pinctrl setting on its node will be ignored. * * However, we do need to make sure the pins states tied to the * MDIO node are configured properly. Fortunately, the core DM * does that for use when we get a device, so we can work around * that whole issue by just requesting a dummy MDIO driver to * probe, and our pins will get muxed. */ ret = uclass_get_device_by_ofnode(UCLASS_MDIO, mdio, &mdio_dev); if (ret) return ret; return 0; } static int am65_cpsw_mdio_init(struct udevice *dev) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *cpsw_common = priv->cpsw_common; int ret; if (!priv->has_phy || cpsw_common->bus) return 0; ret = am65_cpsw_mdio_setup(dev); if (ret) return ret; cpsw_common->bus = cpsw_mdio_init(dev->name, cpsw_common->mdio_base, cpsw_common->bus_freq, clk_get_rate(&cpsw_common->fclk), priv->mdio_manual_mode); if (!cpsw_common->bus) return -EFAULT; return 0; } static int am65_cpsw_phy_init(struct udevice *dev) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct am65_cpsw_common *cpsw_common = priv->cpsw_common; struct eth_pdata *pdata = dev_get_plat(dev); struct phy_device *phydev; u32 supported = PHY_GBIT_FEATURES; int ret; phydev = phy_connect(cpsw_common->bus, priv->phy_addr, priv->dev, pdata->phy_interface); if (!phydev) { dev_err(dev, "phy_connect() failed\n"); return -ENODEV; } phydev->supported &= supported; if (pdata->max_speed) { ret = phy_set_supported(phydev, pdata->max_speed); if (ret) return ret; } phydev->advertising = phydev->supported; if (ofnode_valid(priv->phy_node)) phydev->node = priv->phy_node; priv->phydev = phydev; ret = phy_config(phydev); if (ret < 0) pr_err("phy_config() failed: %d", ret); return ret; } static int am65_cpsw_ofdata_parse_phy(struct udevice *dev) { struct eth_pdata *pdata = dev_get_plat(dev); struct am65_cpsw_priv *priv = dev_get_priv(dev); struct ofnode_phandle_args out_args; int ret = 0; dev_read_u32(dev, "reg", &priv->port_id); pdata->phy_interface = dev_read_phy_mode(dev); if (pdata->phy_interface == PHY_INTERFACE_MODE_NA) { dev_err(dev, "Invalid PHY mode, port %u\n", priv->port_id); return -EINVAL; } dev_read_u32(dev, "max-speed", (u32 *)&pdata->max_speed); if (pdata->max_speed) dev_err(dev, "Port %u speed froced to %uMbit\n", priv->port_id, pdata->max_speed); priv->has_phy = true; ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "phy-handle", NULL, 0, 0, &out_args); if (ret) { dev_err(dev, "can't parse phy-handle port %u (%d)\n", priv->port_id, ret); priv->has_phy = false; ret = 0; } priv->phy_node = out_args.node; if (priv->has_phy) { ret = ofnode_read_u32(priv->phy_node, "reg", &priv->phy_addr); if (ret) { dev_err(dev, "failed to get phy_addr port %u (%d)\n", priv->port_id, ret); goto out; } } out: return ret; } static int am65_cpsw_port_probe(struct udevice *dev) { struct am65_cpsw_priv *priv = dev_get_priv(dev); struct eth_pdata *pdata = dev_get_plat(dev); struct am65_cpsw_common *cpsw_common; char portname[15]; int ret; priv->dev = dev; cpsw_common = dev_get_priv(dev->parent); priv->cpsw_common = cpsw_common; sprintf(portname, "%s%s", dev->parent->name, dev->name); device_set_name(dev, portname); priv->mdio_manual_mode = false; if (soc_device_match(k3_mdio_soc_data)) priv->mdio_manual_mode = true; ret = am65_cpsw_ofdata_parse_phy(dev); if (ret) goto out; am65_cpsw_gmii_sel_k3(priv, pdata->phy_interface, priv->port_id); ret = am65_cpsw_mdio_init(dev); if (ret) goto out; ret = am65_cpsw_phy_init(dev); if (ret) goto out; out: return ret; } static int am65_cpsw_probe_nuss(struct udevice *dev) { struct am65_cpsw_common *cpsw_common = dev_get_priv(dev); ofnode ports_np, node; int ret, i; struct udevice *port_dev; cpsw_common->dev = dev; cpsw_common->ss_base = dev_read_addr(dev); if (cpsw_common->ss_base == FDT_ADDR_T_NONE) return -EINVAL; cpsw_common->mac_efuse = devfdt_get_addr_name(dev, "mac_efuse"); /* no err check - optional */ ret = power_domain_get_by_index(dev, &cpsw_common->pwrdmn, 0); if (ret) { dev_err(dev, "failed to get pwrdmn: %d\n", ret); return ret; } ret = clk_get_by_name(dev, "fck", &cpsw_common->fclk); if (ret) { power_domain_free(&cpsw_common->pwrdmn); dev_err(dev, "failed to get clock %d\n", ret); return ret; } cpsw_common->cpsw_base = cpsw_common->ss_base + AM65_CPSW_CPSW_NU_BASE; cpsw_common->ale_base = cpsw_common->cpsw_base + AM65_CPSW_CPSW_NU_ALE_BASE; cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE; ports_np = dev_read_subnode(dev, "ethernet-ports"); if (!ofnode_valid(ports_np)) { ret = -ENOENT; goto out; } ofnode_for_each_subnode(node, ports_np) { const char *node_name; u32 port_id; bool disabled; node_name = ofnode_get_name(node); disabled = !ofnode_is_enabled(node); ret = ofnode_read_u32(node, "reg", &port_id); if (ret) { dev_err(dev, "%s: failed to get port_id (%d)\n", node_name, ret); goto out; } if (port_id >= AM65_CPSW_CPSWNU_MAX_PORTS) { dev_err(dev, "%s: invalid port_id (%d)\n", node_name, port_id); ret = -EINVAL; goto out; } cpsw_common->port_num++; if (!port_id) continue; cpsw_common->ports[port_id].disabled = disabled; if (disabled) continue; ret = device_bind_driver_to_node(dev, "am65_cpsw_nuss_port", ofnode_get_name(node), node, &port_dev); if (ret) dev_err(dev, "Failed to bind to %s node\n", ofnode_get_name(node)); } for (i = 0; i < AM65_CPSW_CPSWNU_MAX_PORTS; i++) { struct am65_cpsw_port *port = &cpsw_common->ports[i]; port->port_base = cpsw_common->cpsw_base + AM65_CPSW_CPSW_NU_PORTS_OFFSET + (i * AM65_CPSW_CPSW_NU_PORTS_OFFSET); port->macsl_base = port->port_base + AM65_CPSW_CPSW_NU_PORT_MACSL_OFFSET; } node = dev_read_subnode(dev, "cpsw-phy-sel"); if (!ofnode_valid(node)) { dev_err(dev, "can't find cpsw-phy-sel\n"); ret = -ENOENT; goto out; } cpsw_common->gmii_sel = ofnode_get_addr(node); if (cpsw_common->gmii_sel == FDT_ADDR_T_NONE) { dev_err(dev, "failed to get gmii_sel base\n"); goto out; } cpsw_common->bus_freq = dev_read_u32_default(dev, "bus_freq", AM65_CPSW_MDIO_BUS_FREQ_DEF); dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 0x%08X Ports:%u mdio_freq:%u\n", readl(cpsw_common->ss_base), readl(cpsw_common->cpsw_base), readl(cpsw_common->ale_base), cpsw_common->port_num, cpsw_common->bus_freq); out: clk_free(&cpsw_common->fclk); power_domain_free(&cpsw_common->pwrdmn); return ret; } static const struct udevice_id am65_cpsw_nuss_ids[] = { { .compatible = "ti,am654-cpsw-nuss" }, { .compatible = "ti,j721e-cpsw-nuss" }, { .compatible = "ti,am642-cpsw-nuss" }, { } }; U_BOOT_DRIVER(am65_cpsw_nuss) = { .name = "am65_cpsw_nuss", .id = UCLASS_MISC, .of_match = am65_cpsw_nuss_ids, .probe = am65_cpsw_probe_nuss, .priv_auto = sizeof(struct am65_cpsw_common), }; U_BOOT_DRIVER(am65_cpsw_nuss_port) = { .name = "am65_cpsw_nuss_port", .id = UCLASS_ETH, .probe = am65_cpsw_port_probe, .ops = &am65_cpsw_ops, .priv_auto = sizeof(struct am65_cpsw_priv), .plat_auto = sizeof(struct eth_pdata), .flags = DM_FLAG_ALLOC_PRIV_DMA | DM_FLAG_OS_PREPARE, }; static const struct udevice_id am65_cpsw_mdio_ids[] = { { .compatible = "ti,cpsw-mdio" }, { } }; U_BOOT_DRIVER(am65_cpsw_mdio) = { .name = "am65_cpsw_mdio", .id = UCLASS_MDIO, .of_match = am65_cpsw_mdio_ids, };
Has some revert changes to fix ""No ethernet found." error and some build issues related to the following. This means the fix to this was not to add "CONFIG_SYSCON=y" and "CONFIG_SPL_SYSCON=y" to the ethboot defconfig (I will fix this in the FAQ).
/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/k3r5-devkit/sysroots/x86_64-arago-linux/usr/bin/arm-oe-eabi/arm-oe-eabi-ld.bfd: drivers/net/ti/am65-cpsw-nuss.o: in function `am65_cpsw_am654_get_efuse_macid': /home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674/drivers/net/ti/am65-cpsw-nuss.c:550: undefined reference to `syscon_regmap_lookup_by_phandle' make[3]: *** [/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674/scripts/Makefile.spl:527: spl/u-boot-spl] Error 1 make[2]: *** [/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674/Makefile:2044: spl/u-boot-spl] Error 2 make[2]: Leaving directory '/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/u-boot-build/r5' make[1]: *** [Makefile:177: sub-make] Error 2 make[1]: Leaving directory '/home/a0500327/ti-processor-sdk-linux-rt-am62xx-evm-09.02.01.09/board-support/ti-u-boot-2023.04+gitAUTOINC+f9b966c674' make: *** [makerules/Makefile_u-boot:28: u-boot-r5] Error 2
2. <u-boot directory >/configs/am62x_evm_a53_defconfig
Not really necessary if you don't mind seeing the following show up in the EVM console during boot up. Using this defconfig I'm guessing will get rid of the below issues due to the following
# CONFIG_AUTOBOOT is not set
CONFIG_IP_DEFRAG=y
CONFIG_NET_MAXDEFRAG=65535
CONFIG_TFTP_BLOCKSIZE=65464
U-Boot 2023.04-dirty (Apr 18 2024 - 13:38:04 -0500) SoC: AM62X SR1.0 HS-FS Model: Texas Instruments AM625 SK EEPROM not available at 80, trying to read at 81 Board: AM62B-SKEVM rev A DRAM: no bloblist found!2 GiB Core: 72 devices, 32 uclasses, devicetree: separate MMC: mmc@fa10000: 0, mmc@fa00000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Net: eth0: ethernet@8000000port@1 Hit any key to stop autoboot: 0 MMC: no card present SD/MMC found on device 1 MMC: no card present ** Bad device specification mmc 1 ** Couldn't find partition mmc 1 Can't set block device MMC: no card present ** Bad device specification mmc 1 ** Couldn't find partition mmc 1 Can't set block device MMC: no card present ** Bad device specification mmc 1 ** ## Error: "main_cpsw0_qsgmii_phyinit" not defined MMC: no card present ** Bad device specification mmc 1 ** Couldn't find partition mmc 1:2 Can't set block device MMC: no card present ** Bad device specification mmc 1 ** Couldn't find partition mmc 1:2 Can't set block device libfdt fdt_check_header(): FDT_ERR_BADMAGIC No FDT memory address configured. Please configure the FDT address via "fdt addr <address>" command. Aborting! Bad Linux ARM64 Image magic! switch to partitions #0, OK mmc0(part 0) is current device ** No partition table - mmc 0 ** Couldn't find partition mmc 0:1 MMC: no card present starting USB... Bus usb@31100000: generic_phy_get_bulk : no phys property Register 1000840 NbrPorts 1 Starting the controller USB XHCI 1.10 scanning bus usb@31100000 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Device 0: unknown device link up on port 1, speed 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 172.168.1.170 (2 ms) *** Warning: no boot file name; using 'ACA801AA.img' Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'ACA801AA.img'. Load address: 0x82000000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 missing environment variable: pxeuuid Retrieving file: pxelinux.cfg/01-1c-63-49-0f-61-14 link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/01-1c-63-49-0f-61-14'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/ACA801AA link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/ACA801AA'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/ACA801A link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/ACA801A'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/ACA801 link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/ACA801'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/ACA80 link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/ACA80'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/ACA8 link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/ACA8'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/ACA link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/ACA'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/AC link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/AC'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/A link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/A'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/default-arm-k3-am62x link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/default-arm-k3-am62x'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/default-arm-k3 link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/default-arm-k3'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/default-arm link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/default-arm'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Retrieving file: pxelinux.cfg/default link up on port 1, speed 1000, full duplex Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'pxelinux.cfg/default'. Load address: 0x80100000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 Config file not found link up on port 1, speed 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 172.168.1.170 (3 ms) Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'boot.scr.uimg'. Load address: 0x80000000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 link up on port 1, speed 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 172.168.1.170 (3 ms) Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'boot.scr.uimg'. Load address: 0x82000000 Loading: * TFTP error: 'File not found' (1) Not retrying... am65_cpsw_nuss_port ethernet@8000000port@1: RX dma free_pkt failed -22 => CTRL-A Z for help | 115200 8N1 | NOR | Minicom 2.8 | VT102 | Offline | ttyUSB4
Replacing the 2 files above should result in the following:
U-Boot SPL 2023.04-dirty (Apr 18 2024 - 13:27:35 -0500) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)') SPL initial stack usage: 13408 bytes Trying to boot from eth device eth0: ethernet@8000000port@1 ethernet@8000000port@1 Waiting for PHY auto negotiation to complete....... done link up on port 1, speed 1000, full duplex BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 DHCP client bound to address 172.168.1.170 (1265 ms) Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'tispl.bin'. Load address: 0x82000000 Loading: ################################################################# ################################################################# ################################################################# ################################### 0 Bytes 5 MiB/s done Bytes transferred = 1174115 (11ea63 hex) udma_stop_mem2dev: peer not stopped TIMEOUT ! Authentication passed Authentication passed Authentication passed init_env from device 4 not supported! Authentication passed Authentication passed Starting ATF on ARM64 core... NOTICE: BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty NOTICE: BL31: Built : 16:09:05, Feb 9 2024 U-Boot SPL 2023.04-dirty (Apr 18 2024 - 13:27:46 -0500) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)') SPL initial stack usage: 1856 bytes Trying to boot from eth device Loading Environment from nowhere... OK eth0: ethernet@8000000port@1 ethernet@8000000port@1 Waiting for PHY auto negotiation to complete....... done link up on port 1, speed 1000, full duplex BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 172.168.1.170 (1759 ms) Using ethernet@8000000port@1 device TFTP from server 172.168.1.1; our IP address is 172.168.1.170 Filename 'u-boot.img'. Load address: 0x82000000 Loading: ################################################################# ################################################################# ######################################################## 0 Bytes 8.9 MiB/s done Bytes transferred = 949355 (e7c6b hex) Authentication passed Authentication passed U-Boot 2023.04-dirty (Apr 18 2024 - 13:27:46 -0500) SoC: AM62X SR1.0 HS-FS Model: Texas Instruments AM625 SK EEPROM not available at 80, trying to read at 81 Board: AM62B-SKEVM rev A DRAM: no bloblist found!2 GiB Core: 72 devices, 32 uclasses, devicetree: separate MMC: mmc@fa10000: 0, mmc@fa00000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Net: eth0: ethernet@8000000port@1 =>
-Daolin
Daolin, this is great information and thank you SO much!
I will give these changes a try.
I've run into another problem. When attempting to load a VxWorks image (yes! VxWorks), I'm receiving a "Wrong Image Format for bootm command" message. The VxWorks image is a known working image.
tftp 0x93000000 uVxWorks; tftp 0x90000000 dts.dtb; bootm 0x93000000 - 0x90000000;
Yes, adding the CONFIG_LEGACY_IMAGE_FORMAT=y allows the bootm command to work. However, VxWorks fails to load properly until I remove the cpsw3g_mdio device. It appears VxWorks doesn't like something that U-Boot is doing to the Ethernet phy
Just to clarify, does the bootm command now working mean no "Wrong Image Format for bootm command" is now seen? Can you show me the console output when VxWorks fails to load properly?
When you say remove the "cpsw3g_mdio device" you mean setting the status= "disabled" in ti-u-boot k3-am625-sk.dts?
-Daolin
Yes, the bootm command now works. Below is a screenshot of where VxWorks stops loading. You can see it is when it's trying to probe and attach the mdio device. Yes, I placed status="disabled" in the dts file for the cpsw3g_mdio device. This allows VxWorks to fully boot.
I'm assuming this disable of cpsw3g_mdio is not a good workaround since you will be needing Ethernet MAC to PHY communication for your application?
Was there anything else that changed on the dts file from the default TI provided dts? I will need to discuss with a team member about this issue further and will give an update at the end of the day or tomorrow.
-Daolin
Update:
Based on the console output, it appears to be a VxWorks initialization issue for the mdio module. In general, we don't support VxWorks, it would be best to contact the vendor who owns VxWorks about this issue.
-Daolin
Daolin, thank you for your support in this matter. It is greatly appreciated. As I won't be using this method permanently, it's ok that the Ethernet must be disabled to get VxWorks up and running. The Ethernet booting is a workaround for the lack of an SD card for a test fixture.