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AM625-Q1: Board Boot loops during kernel load

Part Number: AM625-Q1
Other Parts Discussed in Thread: SK-AM62B-P1

Hi Team,

Processor MF no: AM6252ASGFHIAMCRQ1


Unable to boot to kernel 

getting error as below on boot

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U-Boot SPL 2023.04-ti-gd2612223375a (Feb 01 2024 - 15:06:40 +0000)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
SPL initial stack usage: 13392 bytes
Trying to boot from MMC2
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Authentication passed
Starting ATF on ARM64 core...
NOTICE: BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
NOTICE: BL31: Built : 15:06:40, Feb 1 2024
U-Boot SPL 2023.04-ti-gd2612223375a (Feb 01 2024 - 15:06:40 +0000)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
SPL initial stack usage: 1904 bytes
i2c_write: error waiting for data ACK (status=0x116)
pca953x gpio@22: Error reading output register
Trying to boot from MMC2
Authentication passed
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Below is the Patch we have done,

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diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c
index 9146361b3a..543d4ea061 100644
--- a/board/ti/am62x/evm.c
+++ b/board/ti/am62x/evm.c
@@ -50,7 +50,7 @@ static struct gpio_desc board_det_gpios[AM62X_LPSK_BRD_DET_COUNT];
#define board_is_am62x_skevm() (board_ti_k3_is("AM62-SKEVM") || \
board_ti_k3_is("AM62B-SKEVM"))
-#define board_is_am62b_p1_skevm() board_ti_k3_is("AM62B-SKEVM-P1")
+#define board_is_am62b_p1_skevm() true //Bypassing
#define board_is_am62x_lp_skevm() board_ti_k3_is("AM62-LP-SKEVM")
#define board_is_am62x_sip_skevm() board_ti_k3_is("AM62SIP-SKEVM")
#define board_is_am62x_play() board_ti_k3_is("BEAGLEPLAY-A0-")
diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig
index 56a65c0a40..1929b102a4 100644
--- a/board/ti/common/Kconfig
+++ b/board/ti/common/Kconfig
@@ -16,13 +16,13 @@ config EEPROM_BUS_ADDRESS
int "Board EEPROM's I2C bus address"
range 0 8
default 0
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

kindly help

regards,

Pawan

  • Hi Pawan,

    When first power on the board, please stop at the U-Boot prompt and run the following command to dump a register.

    => md.l 0x43018178 1

    Then when Linux boot reset, stop at the U-Boot prompt and dump the same register again.

  • Hi Bin,

    this is output after uboot's  auto reset

    => md.l 0x43018178 1
    43018178: 00000000 ....
    => boot

    still boot loop continues,

    I'm getting appropriate values for mcu and main reset. but unable to find root cause of this auto reset during kernel load .

    any possibility of some other reset other than 0x43018178 reg resets due to which all 00000000 can come ?

    here is the log,

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    U-Boot SPL 2023.04-ti-gd2612223375a (Feb 01 2024 - 15:06:40 +0000)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
    SPL initial stack usage: 13392 bytes
    Trying to boot from MMC2
    Authentication passed
    Authentication passed
    Authentication passed
    Authentication passed
    Authentication passed
    Starting ATF on ARM64 core...
    NOTICE: BL31: v2.10.0(release):v2.10.0-367-g00f1ec6b87-dirty
    NOTICE: BL31: Built : 15:06:40, Feb 1 2024
    U-Boot SPL 2023.04-ti-gd2612223375a (Feb 01 2024 - 15:06:40 +0000)
    SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')
    SPL initial stack usage: 1904 bytes
    i2c_write: error waiting for data ACK (status=0x116)
    pca953x gpio@22: Error reading output register
    Trying to boot from MMC2
    Authentication passed
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Regards,

    Pawan

  • Hi Pawan,

    The value 0 from register 0x43018178 indicates the reboot is not caused by any Reset event, but likely the SoC lost power during Linux boot. Please probe all the power rails during Linux boot to see if they are still in the valid range at the time when reboot happens.

  • Hi Bin, 

    We checked the rail, loop was due to DRAM being reset by the Soc. 

    Then we probed SoC Core,  voltage dips happen during loop.

    Unfortunately we connected most reset signals , to  SoC GPIO and during boot we get LEDs connected to gpio flicker. Is it possible for core voltage to dip when multiple 0.85 rail powered ICs are oscillating in RESET?

    Regards,

    Pawan

  • Hi Pawan,

    Thanks for the update. I am routing your query to our Power Management hardware expert for comments.

  • Hello Pawan 

    We checked the rail, loop was due to DRAM being reset by the Soc. 

    Then we probed SoC Core,  voltage dips happen during loop.

    Unfortunately we connected most reset signals , to  SoC GPIO and during boot we get LEDs connected to gpio flicker. Is it possible for core voltage to dip when multiple 0.85 rail powered ICs are oscillating in RESET?

    I am not familiar with the design to comment.

    Can you provide additional information on the board including if this is a custom board and the power architecture you are using.

    Can you confirm you have measured all the supplied rails to be within the ROC.

    Have you confirmed you are following the required power sequencing.

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    We probed the voltage rails, all are proper.

    Found a issue when we tried to boot with minimal boot image. Boot stuck at kernel load (below is the last 4 line where it stuck log)

    [ 1.399826] Key type dns_resolver registered

    [ 1.404881] registered taskstats version 1

    [ 1.415770] Loading compiled-in X.509 certificates

    [ 1.512858] ti-sci 44043000.system-controller: ABI: 3.1 (firmware rev 0x0009 '9.2.7--v09.02.07 (Kool Koala)')

    [ 1.537102] ti-sci-clk 44043000.system-controller:clock-controller: recalc-rate failed for dev=13, clk=7, ret=-19

    [ 1.562770] omap8250 2800000.serial: failed to get alias

    [ 1.698729] ti-sci-clk 44043000.system-controller:clock-controller: is_prepared failed for dev=13, clk=7, ret=-19

    [ 1.709620] ALSA device list:

    [ 1.712684] No soundcards found.

    [ 1.716276] Warning: unable to open an initial console.

    [ 1.721721] Waiting for root device PARTUUID=07e1c071-02

    Stuck at above last statement.

    Does the SD card need to be restarted during kernel load ?

    We have our custom board without IO expander (which is present in EVM).

    Hence the Reset and Enable signals connected in IO expander (in EVM) are actually connected to SoC GPIO.

    We have following observations

    In EVM,

    GPIO_31(GPMC0 CLK) is connected to PMIC_VSEL_SD 

    IO expander is present.

    In our custom board, (AMC package)

    Mainly,

    GPIO_40(GPMC0 DIR) is connected to PMIC_VSEL_SD of PMIC and most reset pins (Io exp reset signals of Evm) are connected to  SoC gpio. Since IO expander is not present,

    GPIO_0_76 (RGMII1_TD1) is connected to MMC1_SD_EN of SDCARD LOAD SWITCH ENABLE pin (pulled up by default.)

    ,PROBED: We have constant 3.3 voltage at SDCARD MMC1 POWER during complete boot stuck process and configured only for SDIO lines to 3.3 .

    Suspect SD card enable.

    Kindly guide us changes (Hardware/firmware) that need to be done to properly bring up kernel boot.

    REGARDS

    PAWAN

  • Hello Pawan, 

    Thank you.

    It is going to be a challenge and inefficient debugging without schematics.

    If you did not use the load switch to reset SD card power supply, i assume you are fixing the SD card interface voltage to 3.3V since UHS-I speed will not be supported. This has to be done in the software.

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    Yes , we are fixing the 3.3 SDIO voltage for SDCARD.

    Would like to know default EVM device tree used for custom board is compatible with 3.3 SDIO fixed voltage or not. If not , then need to know the changes that need to be done on device tree.

    I have Shared you the required documents details in private. Please find the document and kindly do the needful

    Regards

    Pawan

  • Hello Pawan,

    Thank you.

    Would like to know default EVM device tree used for custom board is compatible with 3.3 SDIO fixed voltage or not. If not , then need to know the changes that need to be done on device tree.

    This assume the SK implementation and the SK has a load switch.

    Please check the below FAQ 

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1323247/faq-am64x-common-design-errors-recommendations-for-custom-board-hardware-design-evm-sk-schematics-design-update-note/5215932#5215932

    Regards,

    Sreenivasa

  • Hello Pawan, 

    Suspect SD card enable.

    Kindly guide us changes (Hardware/firmware) that need to be done to properly bring up kernel boot.

    I do not see a pull of the SD_EN pin.

    Please refer the SK schematics and add the required pull.

    The below FAQ should help. We have design notes and review notes added to the schematics for customer to use.

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1332316/faq-am625-am623-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62b-p1-schematics

    Regards

    Sreenivasa

  • Hello Pawan, 

    Based on quick schematics review, we observed that all the DNIs in the SK schematics have been  due to reuse.

    We checked the rail, loop was due to DRAM being reset by the Soc. 

    Then we probed SoC Core,  voltage dips happen during loop.

    Unfortunately we connected most reset signals , to  SoC GPIO and during boot we get LEDs connected to gpio flicker. Is it possible for core voltage to dip when multiple 0.85 rail powered ICs are oscillating in RESET?

    On the custom board please ensure all the DNI components have been depopulated.

    Refer below FAQ 

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1186927/faq-am625-am623-am625sip-am625-q1-am620-q1-custom-board-hardware-design---reusing-ti-sk-evm-design-files

    The OSPI interface had a pullup of 0R. This is not recommended and likely cause some performance issues. This needs to be changed to 10K.

    Regards,

    Sreenivasa

  • Hello Pawan, 

    Please refer below.

    I did a review of the SD card interface

    Provision to reset the SD card similar to the SK seems to have provided.

    The MMC1_SD_EN and PMIC_VSEL_SD mapping is changed. I assume this has been updated in the software. Please verify.

    You need to remove the code that fixed the SD card to 3.3V.

    I see that the PMIC outputs does not have the recommended caps. I assume you referred SK-AM62B-P1.

    Please review and update the values. Also review the schematics for any difference in mapping of IOs or component values.

    The below FAQ could help

    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1332316/faq-am625-am623-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62b-p1-schematics

    Regards,

    Sreenivasa