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AM625: GPIO's impedance change in DeepSleep mode

Part Number: AM625

Tool/software:

Hello support team,

We are encountering an issue with the GPIO behavior on our product based on the AM62 SoC.

When the SoC enters DeepSleep mode, the voltage level drops on the pins set to High. This voltage drop depends on the load/pull-down resistor attached to the SoC's pin, leading to problems.

For instance, a USB device (flash drive) is connected to USB0. The USB0_DRVVBUS pin of the SoC controls the USB power switch and has an external 10 kOhm pull-down resistor to the ground.

In active mode, the voltage on the USB0_DRVVBUS pin is 1.8V. However, when the SoC enters DeepSleep mode, the voltage on the USB0_DRVVBUS pin drops to 0.3-0.5V, causing the USB power switch to disconnect power from the attached USB device. This results in the SoC hanging, and it is impossible to recover from DeepSleep mode without resetting the SoC.

To solve this issue, I replaced the 10 kOhm pull-down resistor on the USB0_DRVVBUS pin with a 100 kOhm resistor. This resolved the SoC hang issue, but I have concerns regarding the reliability of this solution.

Measurements on the USB0_DRVVBUS pin with the 100 kOhm pull-down resistor show a voltage drop of 0.35V when the SoC enters DeepSleep mode. According to my calculations, the internal impedance of the USB0_DRVVBUS pin changes from almost 0 Ohms to 24 kOhms.

According to the configuration in the PADCONFIG register for the pin USB0_DRVVBUS it should retain its state when the SoC goes into the DeepSleep mode.

Identical behavior is valid also for the USB1_DRVVBUS pin and I suspect, for other GPIO-capable pins.

Is this behavior expected when the SoC enters DeepSleep mode?

What happens to the SoC's pins when it goes into DeepSleep mode?

I could not find any explanation of this behavior in the SoC's datasheet or reference manual.

Thank you.