TMS320VC5507: detailed information about USB DPLL

Kotaro Yamashita

Part Number: TMS320VC5507

Tool/software:

Hi Expart,

My customer would like to know the detailed infromation about USB DPLL. Do we have any specific documentation to explain this?

e.g. Block diagram

Regards,

Kotaro Yamashita

2 months ago

0 Ming Wei 2 months ago

TI__Mastermind 45425 points

Hi Kotaro,

It is described in section 2.4 in the attached document.

Best regards,

Ming

USB_spru596a.pdf

0 satoshi shimose 1 month ago in reply to Ming Wei

Prodigy 20 points

Thank you for your answer.

I'm the original questioner.

We are currently investigating the time it takes for the USB DPLL to lock. After switching frequencies, we measure the lock time by polling the lock bit. This shows that the lock time has a dispersion of several tens of microseconds. We would like to create a physical model of this dispersion. Our goal is not to stabilize the switching time. We want to know what physical phenomena are occurring inside the IC.

0 Ming Wei 1 month ago in reply to satoshi shimose

TI__Mastermind 45425 points

Hi Satoshi,

As it mentioned in the above shared document (section 2.4), C5507 has two options for USB PLL: DPLL and APLL. The DPLL behaves the same as the DPLL for DSP CPU (2.4.2). It takes 1ms to lock. The APLL will take 350us to lock (2.4.3). Of course, the safest way is to check the LOCK bit of USBDPLL and MODE bit of USBAPLL.

Best regards,

Ming

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TMS320VC5507: detailed information about USB DPLL