TDA4VH-Q1: TDA4VH CPSW9G PTP function for linux native driver

sun ruijie

Intellectual 603 points

Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH

Tool/software:

Hi TI，

Does CPSW9G support MACPORT1 as PTP slave mode, MACPORT2 as PTP master mode?

thanks

9 months ago

0 Tanmay Patil 9 months ago

TI__Mastermind 34010 points

Hi,

Yes this is possible. See this documentation for details on how to set this up : https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/09_01_00_06/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/Network/CPSW-PTP.html#ptp-with-transparent-clock-switch-mode

Regards,
Tanmay

0 sun ruijie 9 months ago in reply to Tanmay Patil

Intellectual 603 points

Hi Tanmay,

We've looked at this documentation and tested it. We want tda4vh to both synchronize the time via gptp and forward the gptp. This mode seems to be called BC(Boundary Clock) mode, not TC(Transparent clock) mode(ptp4l(8): PTP Boundary/Ordinary/Transparent Clock (nwtime.org)). Does tda4vh support BC mode under linux natvier driver? How to implement the BC mode?

Best Regards,
Ruijie

0 Tanmay Patil 9 months ago in reply to sun ruijie

TI__Mastermind 34010 points

Hi Ruijie,

I believe the boundary clock can be used by running ptp4l twice. Once in master mode and once in slave mode. on the device with switch.

Regards,
Tanmay

0 sun ruijie 9 months ago in reply to Tanmay Patil

Intellectual 603 points

Hi Tanmay,

Any specific samples? It feels like this would lead to larger timing gap between different boards.

Best Regards,
Ruijie

0 Tanmay Patil 8 months ago in reply to sun ruijie

TI__Mastermind 34010 points

Hi Ruijie,

No it won't won't as the CPTS clock used for timestamping in both the cases will be the same hardware clock.

I won't be able to try this anytime soon. Is it possible for you to try this out.

Regards,
Tanmay

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TDA4VH-Q1: TDA4VH CPSW9G PTP function for linux native driver