PROCESSOR-SDK-AM62A: How to make chip-select pin active low

Part Number: PROCESSOR-SDK-AM62A

Tool/software:

Hi, 

Yocto SDK: 09_01_00

EVM: AM62A SK EVM

We are using above mention sdk and evm. We wanted to use the spi interface. we have configured the spi interface from dts as below.

&main_pmx0 {
    max22516_spi_pins_default: max22516-spi-pins-default {
        pinctrl-single,pins = <
            AM62AX_IOPAD(0x01bc, PIN_INPUT, 0) /* (A17) SPI0_CLK */
            AM62AX_IOPAD(0x01b4, PIN_INPUT, 0) /* (D16) SPI0_CS0 */
            AM62AX_IOPAD(0x01c0, PIN_INPUT, 0) /* (B15) SPI0_D0 */
            AM62AX_IOPAD(0x01c4, PIN_INPUT, 0) /* (E15) SPI0_D1 */
        >;
    };
};

&main_spi0 {
    pinctrl-names = "default";
    pinctrl-0 = <&max22516_spi_pins_default>;
    status = "okay";
    spidev@0 {
        compatible = "rohm,dh2228fv";
        spi-max-frequency = <15000000>;
        reg = <0>;
    };
};

with this "/dev/spidev1.0" is getting created. Now when we want to send/receive the data over spi interface, cs(chip-select) is made low to high at start of data transfer and then chip-select pin goes low once data transfer is completed.

Now, we want to reverse the chip-select pin. we want to make the pin-low once data transfer starts and want to make it high once data transfer is completed. How can we toggle the behavior of chip select pin? We are using linux application to read/ write from "/dev/spidev1.0".

Regards,

Jay 

 
  • Hi Jay,

    Now, we want to reverse the chip-select pin. we want to make the pin-low once data transfer starts and want to make it high once data transfer is completed. How can we toggle the behavior of chip select pin?

    You can control this through the device tree property `spi-cs-high`, see the below code snippet from the Kernel source tree as an example how to use this:

    arch/arm64/boot/dts/ti/k3-am642-evm.dts-&main_spi0 {
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-        status = "okay";
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-        pinctrl-names = "default";
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-        pinctrl-0 = <&main_spi0_pins_default>;
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-        ti,pindir-d0-out-d1-in;
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-        eeprom@0 {
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-                compatible = "microchip,93lc46b";
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-                reg = <0>;
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-                spi-max-frequency = <1000000>;
    arch/arm64/boot/dts/ti/k3-am642-evm.dts:                spi-cs-high;
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-                data-size = <16>;
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-        };
    arch/arm64/boot/dts/ti/k3-am642-evm.dts-};

    Regards, Andreas