Tool/software:
I am trying to display a splash screen on an AM6252 custom board.
However, when I attempt to display the splash screen, a "Synchronous Abort" error occurs.
I would like to understand the cause of the "Synchronous Abort" and would appreciate your assistance.
Unlike the EVM, I am using a single-port LVDS panel.
I checked the defconfig and device tree using the links below:
The device tree I modified for using the splash screen in U-Boot is as follows:
panel_lvds: panel-lvds {
bootph-pre-ram;
compatible = "simple-panel";
status= "okay";
width-mm = <154>;
height-mm = <86>;
data-mapping = "vesa-24";
panel-timings {
bootph-pre-ram;
clock-frequency = <5120000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <160>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-len = <108>;
vsync-len = <3>;
de-active = <1>;
};
};
&dss {
clocks = <&k3_clks 186 6>,
<&k3_clks 186 0>,
<&k3_clks 186 2>;
ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
pinctrl-names = "default";
pinctrl-0 = <&main_dss0_pins_default>;
};
Interestingly, the splash screen works fine in the Linux kernel, but it does not work in U-Boot.
To verify in U-Boot, I used the following command line, which resulted in a "Synchronous Abort" error.
ext4load mmc 0:9 $loadaddr intellian.bmp bmp display $loadaddr m m
For debugging, I enabled debug prints, and the logs are as follows:
=> bmp display $loadaddr m m [common/bmp.c : 125] bmp_display [common/bmp.c : 136] bmp_display map_to_sysmem complete dss@30200000 (dss_plane_init:714): vidl1: bufsize 2560, buf_threshold 2559/1280, mflag threshold 1706/853 preload 1280 dss@30200000 (dss_plane_init:714): vid: bufsize 2560, buf_threshold 2559/1280, mflag threshold 1706/853 preload 1280 dss@30200000 (dss_vp_set_clk_rate:613): vp0: new rate 1125000000 Hz (requested 1120000000 Hz) dss@30200000 (dss_vp_set_gamma:409): dss_vp_set_gamma: hw_videoport 0, lut len 0, hw len 256 dss@30200000 (dss_vp_write_gamma_table:389): dss_vp_write_gamma_table: hw_videoport 0 dss@30200000 (tidss_drv_probe:902): DSS fclk 250000000 Hz "Synchronous Abort" handler, esr 0x96000044 elr: 000000008085a160 lr : 000000008085a0fc (reloc) elr: 00000000fff5d160 lr : 00000000fff5d0fc x0 : 00000000fdef9650 x1 : ffffffffff700000 x2 : ffffffffff958000 x3 : 0000000000000000 x4 : 0000000000000000 x5 : 0000000000000000 x6 : 00000000fdef9650 x7 : 0000000000000000 x8 : 000000000000000c x9 : 0000000000000008 x10: 00000000ffffffe8 x11: 0000000000000006 x12: 000000000001869f x13: 0000000000000000 x14: 0000000000000000 x15: 0000000000000000 x16: 00000000fff5d190 x17: 0000000000000000 x18: 00000000fdee3d80 x19: 0000000000000000 x20: 00000000fdee7a40 x21: 00000000fded2a80 x22: 0000000000007fff x23: 0000000000007fff x24: 00000000fffe4e5c x25: 0000000000000000 x26: 0000000000000000 x27: 0000000000000000 x28: 00000000fdefb220 x29: 00000000fded2a20 Code: f9401001 8b020022 eb02003f 54fffec2 (b8004433) Resetting CPU ... resetting ...
For reference, the relevant part of the device tree used in the kernel is shown below.
It works normally in the kernel.
&dss {
status = "okay";
};
&dss_ports {
#address-cells = <1>;
#size-cells = <0>;
/* VP1: LVDS Output (OLDI TX 0) */
lvds_dss: port@0 {
reg = <0>;
oldi_out0: endpoint {
remote-endpoint = <&lcd_in0>;
};
};
};
lcd {
compatible = "gwt,gwt-7.0-1024600-dwmc-55";
backlight = <&lcd_backlight>;
power-supply = <&vcc_3v3_sys>;
/*
* Note that the OLDI TX 0 transmits the odd set of pixels
* while the OLDI TX 1 transmits the even set. This is a
* fixed configuration in the IP integration and is not
* changeable. The properties, "dual-lvds-odd-pixels" and
* "dual-lvds-even-pixels" have been used to merely
* identify if a Dual Link configuration is required.
* But swapping them will cause an error in the dss driver.
*/
port@0 {
lcd_in0: endpoint {
remote-endpoint = <&oldi_out0>;
};
};
};
framebuffer0: framebuffer@ff700000 {
compatible = "simple-framebuffer";
power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
reg = <0x00 0xff700000 0x00 0x008ca000>;
width = <1024>;
height = <600>;
stride = <(1024 * 4)>;
format = "x8r8g8b8";
clocks = <&k3_clks 186 6>,
<&k3_clks 186 0>,
<&k3_clks 186 2>;
display = <&dss>;
status = "okay";
};
Additionally, I added the panel timing in panel-simple.c as shown below:
static const struct display_timing gwt_gwt70_1024600_dwmc55_timing = {
.pixelclock = { 40800000, 51200000, 67200000 },
.hactive = { 1024, 1024, 1024 },
.hfront_porch = { 16, 160, 216 },
.hback_porch = { 160, 160, 160 },
.hsync_len = { 1, 108, 140 },
.vactive = { 600, 600, 600 },
.vfront_porch = { 1, 12, 127 },
.vback_porch = { 23, 23, 23 },
.vsync_len = { 1, 13, 20 },
.flags = DISPLAY_FLAGS_DE_HIGH,
};
static const struct panel_desc gwt_gwt70_1024600_dwmc55 = {
.timings = &gwt_gwt70_1024600_dwmc55_timing,
.num_timings = 1,
.bpc = 6,
.size = {
.width = 154,
.height = 86,
},
.delay = {
.prepare = 30,
.enable = 200,
.disable = 200,
},
.bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
.connector_type = DRM_MODE_CONNECTOR_LVDS,
};
The kmsprint information when it works correctly in the kernel is as follows:
root@AptusLx:~# kmsprint
Connector 0 (40) LVDS-1 (connected)
Encoder 0 (39) LVDS
Crtc 0 (38) 1024x600@54.42 51.200 1024/160/108/160/? 600/12/13/23/? 54 (54.42) 0x0 0x48
Plane 0 (31) fb-id: 48 (crtcs: 0) 0,0 1024x600 -> 0,0 1024x600 (AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12)
FB 48 1024x600
