This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM6442: Enable RTI watchdog in R5 SPL

Part Number: AM6442

Tool/software:

I am working with a customer to enable the RTI watchdog on AM64x during SPL.  The goal is to have the RTI watchdog enabled from early boot to reset the system at any stage of boot.  

Hong helped in the past with an ESM/ SR2.0 related issue [0].

This thread is a good summary: [1]

For testing purposes, I have an AM64B-SKEVM with SR2.0 HS-FS silicon.  k3-am642-r5-sk-dts and am64x_evm_r5_defconfig were modified based on the information across several e2e posts.

 

k3-am642-r5-sk-dts updated to add the RTI nodes:

&cbass_mcu {

    u-boot,dm-spl;
    
    mcu_esm: esm@4100000 {
    
        compatible = "ti,j721e-esm";
        
        reg = <0x0 0x4100000 0x0 0x1000>;
        
        ti,esm-pins = <0>, <1>;
        
        u-boot,dm-spl;
    
    };

};


&cbass_mcu {

u-boot,dm-spl;

    mcu_rti1: rti@40610000 {
    
        compatible = "ti,j7-rti-wdt";
        
        reg = <0x0 0x40610000 0x0 0x100>;
        
        clocks = <&k3_clks 135 0>;
        
        power-domains = <&k3_pds 135 TI_SCI_PD_SHARED>;
        
        assigned-clocks = <&k3_clks 135 0>;
        
        assigned-clock-parents = <&k3_clks 135 4>;
        
        u-boot,dm-spl;
    
    };

};

 

Specifically xixiguohx’s comment is exactly where I’m stuck:

 

I tried to enable it but always got :  WDT:   Not found!

 

I noticed in his separate thread there is no additional information [2]

 

Do you have a list of the necessary changes so I may cross-check against a known-good setup?

 

  • dts changes for r5 and possibly a53?
  • Defconfig options

 

We are still on SDK 8.06, and if this is working in the latest SDK, I can take a look at possibly backporting necessary patches.

 

[0]  AM6442: Watchdog Timer Issue on SR2.0 Silicon - Processors forum - Processors - TI E2E support forums

[1]  AM6422: AM6422: A53 Core 0 stopped working when RTI0 is enabled/configured in tiboot3 (R5F SBL) - Processors forum - Processors - TI E2E support forums

[2]  AM6422: Enable the MCU RTI_WDT in R5 SPL - Processors forum - Processors - TI E2E support forums